Welcome to EE 249 Embedded System Design The

Welcome to EE 249: Embedded System Design The Real Story Alberto Sangiovanni-Vincentelli Department of EECS, University of California at Berkeley

Administration u. Office hours: Alberto’s : Tu-Th 12: 30 pm-2 pm or (better) by appointment (2 -4882) u. Teaching Assistant: s Rong Chen, rongchen@ic. eecs. berkeley. edu 2

Grading u. Grading will be assigned on: s Homeworks (~30%) s Project (~50%) s Reading assignments (~20%) u. There will be approx. 7 homeworks (due 2 weeks after assignment) and 6 reading assignments 3

Discussion sections u Lab section (Th. 4 -6): s tool presentations u Discussion Session (Tu. 5 -6) s students’ presentation of selected papers t t Each student will have to turn in a one-paragraph report for each paper handed out Each student (in groups of 2 -3 people) will have to make an oral presentation once during the class Auditors are OK but please 4

Plan u We are on the edge of a revolution in the way electronics products are designed u System design is the key s Start with the highest possible level of abstraction (e. g. control algorithms) s Establish properties at the right level s Use formal models s Leverage multiple “scientific” disciplines u Establish horizontal and vertical “supplier-chain” like partnerships u Need change in education 5

Course overview Managing Complexity Orthogonalizing concerns Behavior Vs. Architectur e Computation Vs. Communicati on 6

Behavior Vs. Architecture Models of Computat ion Performance models: Emb. SW, comm. and comp. resources 1 System Behavior Simulation Synthesis System 2 Architecture HW/SW partitionin g, Schedulin g SW estimation Mapping 3 Performance Simulation Communication Refinement 4 Flow To Implementation 7

Behavior Vs. Communication u. Clear separation between functionality and interaction model u. Maximize reuse in different environments, change only interaction model ETROPOLIS PIG: Protocol interface generation PEARLS: Latency insensitive protocols 8

Outline of the course u Part 1. Introduction: Future of Information Technology, System Design, IP-based Design, System-on-Chip and Industrial Trends u Part 2. Design Methodology (Platform-based Design, Communication-based Design) u Part 3. Functional Design: Models of Computation u Part 4. Architecture Design: Capture, Exploration and Mapping u Part 5. Implementation Verification and Synthesis, Hardware and Software 9

Introduction Outline u. Scenario and Characteristics of Future Information Technology u. Embedded Systems : Automotive, Home Networks, Smart Dusts, Universal Radios u. What is Needed at the Infrastructure Level u. High-Leverage System Design Paradigms: s Communication-based Design s Architecture-Function Co-design u. Platform-based Design as Implementation Technology 10

Electronics and the Car • More than 30% of the cost of a car is now in Electronics • 90% of all innovations will be based on electronic systems 11

Information Technology Scenario u. According to the International Data Corporation s 96% of all Internet-access devices shipped in the United States in 1997 were PCs. s By the end of 2002, nearly 50% will not be PCs. Instead, they will be digital set-top boxes, cell phones, and personal digital assistants, to name just a few. s By 2004, the unit shipments of such appliances will exceed those of the PC. 12

Historic Perspective u. Technology discontinuities drive new computing paradigms and applications u. E. g. , Xerox Alto s 3 Ms--1 mips, 1 megapixel, 1 mbps s Fourth M: 1 megabyte of memory s From time sharing to client-server with display intensive applications u. What will drive the next discontinuity? What are the new metrics of system capability? 13

What’s Important: Shifts in Technology Metrics u Display (human-computer interface) s More ubiquitous I/Os (e. g. , MEMS sensors & actuators) and modalities (speech, vision, image) s How to Quantify? u Connectivity (computer-computer interface) s Not bandwidth but “scaled ubiquity” s Million accesses (wired and wireless) per day u Computing (processing capacity) s Unbounded capacity & utility functionality (very high mean time to unavailable, gracefully degraded capability acceptable) 14

What’s Important: Shifts in User/Applications Metrics u. Cost: Human Effort s Save time s Reduce effort u. The Next Power Tools s Leveraging other peoples’ effort/expertise e. g. , “What did Dave read about disk prices? ” t e. g. , “What did people who buy this book also buy? ” t 15

Outline u. Scenario and Characteristics of Future Information Technology u. Embedded Systems : Automotive, Home Networks, Smart Dusts, Universal Radios u. What is Needed at the Infrastructure Level u. High-Leverage System Design Paradigms: s Communication-based Design s Architecture-Function Co-design 16

Chips Everywhere! CMOS Camera Source: Dr. K. Pister, UC Berkeley Chips that Fly? Smart. Pen 17

Smart Dust Goal: u. Sensor • Distributed sensor networks u. Interface • Sensor nodes: u. Comm: LOS Optical (CCR, • Autonomous u. Power: battery, solar, cap. Laser) • 1 mm 3 Challenges: • 1 Joule • 1 kilometer • 1 piece 18

Smart Dust Components Laser diode III-V process Passive CCR comm. MEMS/polysilicon Active beam steering laser comm. MEMS/optical quality polysilicon Analog I/O, DSP, Control COTS CMOS Power capacitor Multi-layer ceramic Sensor MEMS/bulk, surface, . . . Solar cell CMOS or III-V Thick film battery Sol/gel V 2 O 5 1 -2 mm 19

Airborne Dust Mapleseed solar cell MEMS/Hexsil/SOI 1 -5 cm Rocket dust MEMS/Hexsil/SOI Controlled auto-rotator MEMS/Hexsil/SOI 20

Synthetic Insects R. Yeh, K. Pister, UCB/BSAC 21

Computing Revolution: Devices in the e. Xtreme Information Appliances: Many computers person, MEMs, CCDs, LCDs, connectivity Information Appliances: Scaled down desktops, e. g. , Car. PC, Pda. PC, etc. Evolution Revolution Evolved Desktops Servers: Scaled-up Desktops, Mem Smart Spaces Display BANG! Mem Keyboard Disk m. Proc PC Evolution m. Proc Information Utility Disk Camera Server, Mem, Disk WAN Camera Display Smart Sensors Display Servers: Integrated with comms infrastructure; Lots of computing in small footprint Computing Revolution 22

Modern Vehicles, an Electronic System IVHS Infrastructure Multiplexed Systems Cellular Phone Body Control Navigation Info/Comms/ AV Bus GPS Stereo/CD Suspension Display Vehicle CAN Bus ECU Transmission ABS Electronic Toll Collection Collision Avoidance Vehicle ID Tracking Wireless Communications/Data Global Positioning SW Architecture Network Design/Analysis Performance Modelling Function / Protocol Validation Supplier Chain Integration 23

Vehicles, a Consumer Electronic System Cellular Phone Navigation Info/Comms/ AV Bus GPS Display Challenges • Minimum Technology to Satisfy User Requirement • Usability • Integrate with Other Vehicle Systems • Add the Function Without Adding the Cost Vehicle Web Site Technology Stereo/CD Comms GSM/PCS CDMA, Paging Compression Output & I/F Serial, Ethernet Diagnostics S/W Shell Windows CE, NT, MAC, BIOS User I/F Voice Synthesis Voice Control Stylus, ETC Processor RISC, Power. PC X 86, Hitachi RISC S/W Apps Browser, Comms, User Apps Display Heads Up, Flat Panel Graphics 24

When Will Dick Tracy’s Watch Be Available? Ultimate Nomadic Tool in Broadband Age u Two-way Communication u Language Translation & Interpretation u e-Secretary u Camera u Music u Electronic Money 25

Smart Buildings Dense wireless network of sensor, monitor, and actuator nodes • Disaster mitigation, traffic management and control • Integrated patient monitoring, diagnostics, and drug administration • Automated manufacturing and intelligent assembly • Task/ambient conditioning systems allow thermal conditioning in • Toys, localized zones, to be individually controlled by small, Interactive Musea building occupants , creating “micro-climates within a building” • Other functions: security, identification and personalization, object tagging, seismic monitoring 26

Home Networking: Application (Subnet) Clusters Voice Phone Web-TV STB Video Phone DVD Player Telecom Based PDA Stereo TV Entertainment Based Cam Corder PC-1 laptop PC-2 Intercom Printer Motion Detectors Video surveillance PC/Data Based Still Camera VCR Video Game Internet Access Sprinklers Door Sensors Window Sensors Utility Customization Security Based Toasters Appliance Based Light Control Ovens Climate Control Smoke Detectors Audio Alarms Clocks 27

Silicon-Processed Micro-needles • Neural probe with fluid • Two micro-needles penetrating channel for bio-medical appl. porterhouse (New-York) steak Lin and Pisano, IEEE/ASME J. of MEMS, Vol. 8, pp 78 -84, 1999 28

Industrial Structure Shift [M units] (%) 100 50 Market Structure Shift -Personal/Internet/Terminal PC DC '98 '00 LSI Market Size （B$） '02 0 lar DC llu e C ine ach M ame G SOC Era has come. World Wide Semiconductor Market Size So. C Market Size PC • PC →ＤＣ • Wintel → Non-Wintel • Shift of Technology Driver 90‘s • PC • Current Percentage of So. C Ratio is under 10%. ⇒ 40％ in 2005, 70～ 80％ in 2010 • So. C is “single-seat constituency “, “take or not”. • Key Factor is the Synergy between Semiconductor & Set Divisions. 00‘s • High Performance ～ Game Machine • Low Power ～ Cellular 29

Productivity Gap 30

The Berkeley Wireless Research Center (BWRC) u. Brodersen, Rabaey, Gray, Meyer, Katz, ASV, Tse and students u. Cadence, Ericsson, HP, Intel, Lucent, ST, TI, Qualcomm u. Next Generation Wireless systems: s Circuits s Architectures s Protocols s Design Methodologies 31

The “Universal” Radio Fourth-generation radio providing following features u Focus on the wireless services with minimal constraints on how the link is provided u Allows for uncoordinated co-existence of service providers (assuming they provide compatible services) u Provides evolving functionality s Adapts to provide requested service given type of service, location, and dynamic variations in environment (i. e. number of users) s Allows for to continuously upgrade to support new services as well as advances in communication engineering and implementation technologies Presents an architectural vision to the multi-user, multi-service problem! u This is in contrast with current approach where standards are the 32

Ultra Low-Power Pico. Radio u Dedicated radio’s for ubiquitous wireless data acquisition and display. Energy dissipation and footprint are of uttermost importance u Goal: P < 1 m. W enabling energy scavenging and self-powering u Challenges: s System architecture: self-configuring and fool-proof s Ultra-low-power design s Automated generation of application-specific radio modules making extensive use of parameterizable 33

Integrated CMOS Radio Dedicated Logic and Memory Logic A D Accelerators (bit level) Timing recovery Equalizers Analog RF Filters analog digital u. C core (ARM) phone book Java Keypad, Control ARQ VM Display MUD Adaptive Antenna Algorithms DSP core Integrate within the same chip very diverse system functions like: wireless channel control, signal processing, codec algorithms, radio modems, RF transceivers… and implement them using a heterogeneous architecture 34

Communication versus Computation u Computation cost (2004): 60 p. J/operation (assuming continued scaling) u Communication cost (minimum): s 100 m distance: 20 n. J/bit @ 1. 5 GHz s 10 m distance: 2 p. J/bit @ 1. 5 GHz u Computation versus Communications s 100 m distance: 300 operations == 1 bit s 10 m distance: 0. 03 operation == 1 bit Computation/Communication requirements vary with distance, data type, and environment 35

Energy-efficient Programmable Implementation Platform “Software-defined Radio” Configurable Arithmetic and Logic Processors Programmable Logic Dedicated Modules Protocol Processing Analog RF Embedded Microprocessor/ DSP System Communication Channel 36

Outline u. Scenario and Characteristics of Future Information Technology u. Embedded Systems : Automotive, Home Networks, Smart Dusts, Universal Radios u. What is Needed at the Infrastructure Level u. High-Leverage System Design Paradigms: s Communication-based Design s Architecture-Function Co-design u. Platform-based Design as Implementation Technology 37

What is Needed? (Endeavor Expedition, Berkeley, Oxygen, MIT) u Automatic Self-Configuration s Personalization on a Vast Scale s Plug-and-Play u The OS of the Planet s New management concerns: protection, information utility, not scheduling the processor s What is the OS of the Internet? TCP plus queue scheduling in routers u Adapts to You s Protection, Organization, Preferences by Example 38

Technology Changes & Architectural Implications u. Zillions of Tiny Devices s Proliferation of information appliances, MEMS, etc. u“Of course it’s connected!” s Cheap, ample bandwidth s “Always on” networking u. Vast (Technical) Capacity s Scalable computing in the infrastructure s Rapid decline in processing, memory, & u. Adaptive Self- Configuration u. Loosely Organized u“Good Enough” Reliability and Availability u. Any-to-Any Transducers (dealing with heterogeneity, over time--legacy--and space) u. Communities (sharing) 39

Adaptive Self-Configuration u Plug-and-Play Networking s No single protocol/API: standardization processes too slow and stifle innovation s Devices probe local environment and configure to interoperate in that environment s “Computer” not defined by the physical box: portals and ensembles u Local Storage is a Cache s Invoke software and apps migrate to local disk u System Learns Preferences by Observation s E. g. , “Privacy by Example: ” owner intervention on first access, observe and learn classification, reduce explicit 40

Loose Organization u. Loosely Structured Information s Large volume, easily shared: supports communities u. Self-Organized s Too time consuming to do yourself: Organize by example s Individualized & context-dependent filtering u Incremental Access, Eventually s exact Query by concept: “What did Dave read about storage prices? ” 41

Any-to-Any Transducers u No need for agreed upon/standardized APIs (though standard data types are useful) s If applications cannot adapt, then generate transducers in the infrastructure automatically s Exploits compiler technology s Enhance plug-and-play to the application level u Legacy Support s Old file types and applications retained in the infrastructure 42

Next-Generation Operating Environments u Advances in hardware and networking will enable an entirely new kind of operating system, which will raise the level of abstraction significantly for users and developers. u Such systems will enforce extreme location transparency s Any code fragment runs anywhere s Any data object might live anywhere s System manages locality, replication, and migration of computation and data u Self-configuring, self-monitoring, self-tuning, scaleable and secure Adapted from Microsoft “Millenium” White Paper 43 http: //www. research. microsoft. com

Outline u. Scenario and Characteristics of Future Information Technology u. Embedded Systems : Automotive, Home Networks, Smart Dusts, Universal Radios u. What is Needed at the Infrastructure Level u. High-Leverage System Design Paradigms: s Communication-based Design s Architecture-Function Co-design u. Platform-based Design as Implementation Technology 44

What is a System Anyway? 45

System (for us) u. Environment to environment u. Sensors + Information Processing + Actuators s Computer is a system s Micro-processor is not 46

Embedded Systems u. Non User-Programmable u. Based on programmable components (e. g. Micro-controllers, DSPs…. ) u. Reactive Real-Time Systems: s “React” to external environment s Maintain permanent interaction s Ideally never terminate s Are subject to external timing constraints (real-time) 47

Electronic System Design Landscape: The Automotive Case Product Definition Platforms Design And Assembly Fabrics IP Interfaces Manufacturing 48

Disaggregation: Complex Design Chain Management Supply Chain System Companies EDA u. Movement of tangible goods from sources to end market u. Supply Chain Management is Design Services Subsystem Companies Software Development Tools $3. 8 B market projected to be $20 B in 2005 Design Chain u. Movement of technology Processor & Hardware IP IC Packaging & Test Semiconductor Companies an untapped market Process & Yield Services Mechanical CAD (IP and knowledge) from sources to end market u. Design Chain Management is Embedded Software Contract Manufacturing Foundries System Test Equipment Fabrication Equipment 49

Supply Chain: Design Roles-> Methodology->Tools Design Roles Methodology Tools 50

Automotive Supply Chain: Car Manufacturers Product Specification & Architecture Definition (e. g. , determination of Protocols and Communication standards) System Partitioning and Subsystem Specification Critical Software Development System Integration 52

Automotive Supply Chain: Subsystem Providers 1 2 3 4 5 6/7 8 9 10 11 Transmission ECU Actuation group Engine ECU DBW Active shift display Up/Down buttons City mode button Up/Down lever Accelerator pedal position sensor Brake switch §Subsystem Partitioning §Subsystem Integration §Software Design: Control Algorithms, Data Processing §Physical Implementation and Production 53

Automotive Supply Chain: Subsystem Providers Application Platform layer (@ 10% of total SW) SW Platform layer (> 60% of total SW) -------Water temp. Odometer Tachometer Speedometer Application Libraries OSEK RTOS Customer Libraries Application Specific Software Application Programming Interface Sys. Config. (> Boot Loader I/O drivers & handlers 20 configurable modules) CCP KWP 2000 Transport OSEK COM m. Controllers Library HW layer Nec 78 k HC 08 HC 12 H 8 S 26 MB 90 § Platform Integration: “firmware” and “glue software” § Software Design: “Application” 54

Automotive Supply Chain: Platform & IP Providers Application Platform layer (@ 10% of total SW) SW Platform layer (> 60% of total SW) -------Water temp. Odometer Tachometer Speedometer Application Libraries OSEK RTOS Customer Libraries Application Specific Software Application Programming Interface Sys. Config. (> Boot Loader I/O drivers & handlers 20 configurable modules) CCP KWP 2000 Transport OSEK COM m. Controllers Library HW layer Nec 78 k HC 08 HC 12 H 8 S 26 MB 90 §“Software” platform: RTOS and communication layer §“Hardware” platform: Hardware and IO drivers 55

Issues Limiting SOC Ramp • Economics • Productivity • Process • IP Delivery & Reuse • Tools & Methodology • Manufacturing How do we move So. C Design from the pilot line to production ? 56 Source: M. Pinto, CTO, Agere

So. C Landscape 2000+ • Total Cost Ownership • Average cost of a high end ASSP >$5 M • Cost of fabrication and mask making has increased significantly ($500 k+ for masks alone) • So. C/ASIC companies look for a 5 -10 x return on development costs (~ $10 M revenue) • Shorter and more uncertain product life cycles • Compounding Complexities limiting Time-to. Market • Chip design complexity • Silicon process complexity • Context complexity • End-to-end verification • New “System to Silicon” methodologies are 57 Source: M. Pinto, CTO, Agere

(Average of Top 10% of Codes) 100 M 15 x - Productivity GAP 10 M System Architecture • Hardware • Software 1. 0 M Logic Design Verification Physical Design Silicon Processing Trans. /Staff-Month Logic Trans. /Chip Productivity 2000+ Challenge Will the design team deliver on time and within budget? 58 Source: M. Pinto, CTO, Agere

Process Challenge Can you integrate what you need ? High performance (speed, power, density) core CMOS+SRAM platform + Efficient (performance/cost) mix-and-match modules Linear (to 4 masks) RF (to 3 masks) Bi. CMOS (3 -4 masks) “Fast Gate” (3 masks) Copper (0 masks) FPGA/FPSC (1 mask) e. SRAM (1 mask) FLASH (<4 masks) Lucent Modular Process Strategy • Communications focus • IP re-use across businesses • Flexible system partitioning • Only pay for what you need • Leverage high volume platform • Manufacture at fabs worldwide Si. Ge (4 masks) DSP ASIC Memory Mixers/VCO LNA/PA Filters ncy que e h Fr Hig (RF) and seb ssing Ba ce Pro 59 Source: M. Pinto, CTO, Agere

Manufacturing Paradigm Challenge Interconnection Dominates Fabrication Throughput % of Fab Process % of Fab of Interconnection vs. % of Fab Up-to-Contact 100 90 80 70 60 50 40 30 20 10 0 Fab % up to contact Fab % of interconnect 2 LM 09µm 2 LM 0. 5 µm 3 LM 0. 35 µm 4 LM 0. 25 µm 6 LM 0. 16 µm • Drives the need for new rapid prototype and production techniques • Impacts industry spare gate methodology for quick fixes • All metal programmable option lose their time to market advantage 60 Source: M. Pinto, CTO, Agere

Deep Submicron Paradigm Shift 40 M Transistors 2, 000 M Metal 600 MHz 2 Wire RC 6 ns/cm 2 M Transistors 100 M Metal 100 MHz 2 Wire RC 1 ns/cm 90% New Design 1991 Virtual Component Based Design - Minimize Design Time - Maximize IP Reuse - Optimize System Level Cell Based Design - Minimize Area - Maximize Performance - Optimize Gate Level 1996 90% Reused Design 200 x 61

Implementation Design Trends Platform Based Consumer Wireless Automotive EDA Hierarchical Microprocessors High end servers & W/S Micro. P Flat Layout Flat ASIC+ Net & Compute Servers Base stations 62

Digital Wireless Platform Dedicated Logic and Memory u. C core (ARM) A D Accelerators (bit level) Timing recovery Equalizers Analog RF Filters analog digital Java phone book VM Keypad, Display Control Logic ARQ MUD Adaptive Antenna Algorithm s DSP core Source: Berkeley Wireless Research Center 63

Will the system solution match the original system spec? • Limited synergies between HW & SW teams • Long complex flows in which teams do not reconcile efforts until the end • High degree of risk that devices will be fully functional Concept • Development • Verification • System Test ? Software VCXO Hardware • IP Selection • Design • Verification Clock Select STM Tx Synth/ I/F Optics MUX Line STS OHP Cell/ I/F STS XC SPE Data Packet Rx CDR/ Map Framer PP Optics De. MUX I/F m. P 64

EDA Challenge to Close the Gap (SIA MARCO GSRC Project, Berkeley Center) • Industry averaging 2 -3 iterations So. C design Behavior Level of Abstraction Design Entry Level SW/HW RTL • Need to identify design issues earlier • Gap between concept and logical / Physical implementation Concept to Reality Gap Gate Level “Platform” Historical EDA Focus Silicon Impact of Design Change (Effort/Cost) Source: GSRC 65