UART — Serial communic MS_u C dnd

UART - Serial communic. MS_u. C / dnd / V 08 4 - 1 Programming Microcontroller UART – Universal Asynchronous Receiver Transmitter 2007 ARM 966 E CORE w/DSP 96 MHz DMA PFQ BC INTR Cntl CLK Cntl LVD BOD PLL ADC RTC 64 K or 96 K Byte SRAM 256 K or 512 K Byte Burst Flash 32 K Byte Burst Flash JTAG ETM 9 OTP Mem TIM SPI STR 912 FW 44 I 2 C Enet MAC USB 2. 0 FS CAN 2. 0 B GPIO EXT. Bus UART

UART - Serial communic. MS_u. C / dnd / V 08 4 - 2 Typical serial communication (low level) Full-duplex interface Receive Device 1 Transmit Receive -PC -embedded system -modem -barcode reader -printer -display (with terminal emulation software) -data logger -sensor (simple or complex) -dongle (security element) -I/O module (digital, analog, encoder, PT 100) -wireless interface Device 2 -PC -Embedded system

EIA-232 -C pin assignments D-Sub male on PC UART - Serial communic. MS_u. C / dnd / V 08 4 - 3 Pin DB 9 Pin DB 25 Symbol Direction Text 1 8 DCD Data Carrier Detect 2 3 Rx Receive Data 3 2 Tx Transmit Data 4 20 DTR Data Terminal Ready 5 7 Gnd 6 6 DSR 7 4 RTS 8 5 CTS Clear to Send 9 22 RI Ring Indicator Out In Signal Ground Data Set Ready Request to Send RS-232 -C: Radio Sector, American Standard since 1969 s Male -> Stecker Female -> Buchse

Serial data format (logical representation) UART - Serial communic. MS_u. C / dnd / V 08 4 - 4 0 msb lsb 1 n 1 -2 stop bits 5 -8 data bits Parity bit if enabled start time lsb: least significant bit (20) msb: most significant bit (2 db-1) 1 bit time = 1 / baudrate Example: parity enabled, 2 stop bits Normally one Byte is sent as 8 data bits Or: One Byte is sent as 7 data bits + parity

UART - Serial communic. MS_u. C / dnd / V 08 4 - 5 Hyperterminal usage Start -> Zubehör -> Kommunikation -> Hyperterminal Go offline Configure COM-Port: File->Properties Xon/Xoff: Software handshake (Exchange on. . ) / both sides must implement this software handshake. The sender has to stop almost immediately upon reception of Xoff character Binary data transmission is not possible. Hardware: RTS/CTS hardware handshake garantees loss-free transmission on a byte level and allows binary data transmission

UART - Serial communic. MS_u. C / dnd / V 08 4 - 6 Hyperterminal communication (no handshake) a) Reset the controller. It will send a string b) Now type some characters. The controller will echo them (not hyperterminal!) try BS character ( backspace) The terminal will interprete it properly try LF character ( line feed, 0 x 0 D). The cursor will move one line down try CR charcter ( carriage return, 0 x 0 A). The cursor jumps to column 0 Serial ports may be simulated using the Simulator output and the serial window: View -> Serial Window -> UART #0

UART - Serial communic. MS_u. C / dnd / V 08 4 - 7 UART – What is it good for? z Simple serial communication (3 -wire) z Multiple physical interfaces: y EIA-232 Peer-to-peer (former RS-232 -C 1969). Gnd based (-15. . 3, 3. . 15 V) y EIA-485 Party Line, multi-point link (SCSI, ISDN, . . . y EIA-422 : Balanced lines, no ground link (D+/D-) on drivers up to 1'000 m @ 100 kbps. Point-to-point or multi-drop. 0 -5 V. Twisted-pair cable z Easy setup z Direct programming z Byte level only z USB will not replace cheap and simple communications EIA: Electronic Industry Alliance

UART - Serial communic. MS_u. C / dnd / V 08 4 - 8 Hardware flow control RTS will be switched on and off by programmable receiv FIFO watermarks

UART - Serial communic. MS_u. C / dnd / V 08 4 - 9 UART features (1/3) z Separate 16 x 8 Transmit and 16 x 12 Receive FIFO z Programmable FIFO disabling for 1 -byte depth z Programmable Baud rate generator : y Baud rate = UARTCLK / (16 × BRR) z Standard Asynchronous communication bits (start, stop and parity) z Independent masking of transmit FIFO, receive timout, modem status, and error condition interrupts z False start bit detection z Line Break Generation and Detection z Support for Modem Control Functions CTS, DCD, DSR, RTS, DTR, and RI z Programmable hardware flow control FIFO: First In First Out sequential, buffer structure

UART - Serial communic. MS_u. C / dnd / V 08 4 - 10 UART features (2/3) z Programmable word length : y 5 bits, 6 bits, 7 bits, 8 bits z Programmable Stop bits : y 1 Stop bit, 2 Stop bits z Even, odd, stick, or no-parity bit generation and detection z Support for Direct Memory Access (DMA) z Support for an Ir. DA Serial Interface (SIR) protocol En. Dec z Parity control z Loop Back z Support baud rates of up to 460. 8 Kbits / second subject to UARTCLK reference clock frequency

UART - Serial communic. MS_u. C / dnd / V 08 4 - 11 UART features (3/3) z 11 Interrupt sources : y Overrun error detected y Break Error y Parity Error y Framing Error y Receive Timeout y Data Transmit y Data Receive y Modem Data Set Ready (DSRMIM) y Modem Data Carrier Detect (DCD) y Modem Clear to Send (CTS) y Modem Ring Indicator (RI)

UART - Serial communic. MS_u. C / dnd / V 08 4 - 12 Ref manual figure 74 UART Block diagram

UART - Serial communic. MS_u. C / dnd / V 08 4 - 13 UART register map

UART - Serial communic. MS_u. C / dnd / V 08 4 - 14 Fractional Baud Rate generator Every baud rate generator has errors. Check the tolerance! BRCLK: baud rate clock

UART - Serial communic. MS_u. C / dnd / V 08 4 - 15 [Peripherals -> UART] UART configuration

UART - Serial communic. MS_u. C / dnd / V 08 4 - 16 Pin connections of UART Use COM 1 of MCBSTR 9. Which port? P 3. 0 UART 0_Rx. D Alternate Input 1 P 3. 1 UART 0_Tx. D Alternate Output 2 STR 91 x ARM 966 manual 12274. pdf, 4. 1 pin functions page 36

UART - Serial communic. MS_u. C / dnd / V 08 4 - 17