Скачать презентацию Roadmap History Synchronized vs Asynchronous overview How it Скачать презентацию Roadmap History Synchronized vs Asynchronous overview How it

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Roadmap History Synchronized vs. Asynchronous overview How it works Benefits of clockless chips Limitations Roadmap History Synchronized vs. Asynchronous overview How it works Benefits of clockless chips Limitations of clockless chips Potential for the future

How fast is your computer? Speed of clock Billionth of a second long All How fast is your computer? Speed of clock Billionth of a second long All operations governed by speed of clock Many operations take different speeds Must be coordinated

History Asynchronous design considered in 1946 by Alan M. Turing David A. Huffman and History Asynchronous design considered in 1946 by Alan M. Turing David A. Huffman and David E. Muller ILLIAC II (1962) Was not reliable with technology of the time Vacuum tubes and relay circuits Moore's law

Disadvantages of clock Process of diminishing returns Slowest process governs speed Clock runs during Disadvantages of clock Process of diminishing returns Slowest process governs speed Clock runs during idle time Increased power consumption Speed of light

Asynchronous Processor Event driven System of local handshaking No global clock Needs way govern Asynchronous Processor Event driven System of local handshaking No global clock Needs way govern processes Signals indicate completion Employes Rendezvous and Arbiter gates

Asynchronous Processor (cont. ) State of circuit changes instantly with signal Varying speed patterns Asynchronous Processor (cont. ) State of circuit changes instantly with signal Varying speed patterns results in varying electromagnetic waves Design must account for speed patterns

Asynchronous Processor (cont. ) Without clock, must know when operation is done Dual-rail circuits Asynchronous Processor (cont. ) Without clock, must know when operation is done Dual-rail circuits Yes, no, or no answer yet

Delay-Intensive Model Makes no assumptions All transistors must be acknowledged Delay-Intensive Model Makes no assumptions All transistors must be acknowledged

Principle of their advantages Variable length processes division Principle of their advantages Variable length processes division

Do they exist? ARM Holdings and Handshake Solutions ARM 996 HS Proposed for use Do they exist? ARM Holdings and Handshake Solutions ARM 996 HS Proposed for use in automotive/medical equipment Philips Pagers Intel, IBM, Sun

Benefits of Clockless chips Executing of individual functions does not wait for next clock Benefits of Clockless chips Executing of individual functions does not wait for next clock pulse Less power consumption Up to 3 times faster Idle time Lower electromagnetic pulse

Limitations Lack of automated designing/testing tools Strict attention to physical design Lengths of wires, Limitations Lack of automated designing/testing tools Strict attention to physical design Lengths of wires, logical gates Predicting complex sequences and coordinating

Inhibitors of Development Pace of market competition Education Synchronous easier to test Inhibitors of Development Pace of market competition Education Synchronous easier to test

Conclusion Many advantages over synchronous Handshakes and coordination circuits Implementation lengthy, lack of resources Conclusion Many advantages over synchronous Handshakes and coordination circuits Implementation lengthy, lack of resources Physical limitations of clock

References http: //iqmagazineonline. com/IQ/IQ 17/Low. Res. pdfs/Pgs 20 -24_IQ 17. pdf http: //www. technologyreview. References http: //iqmagazineonline. com/IQ/IQ 17/Low. Res. pdfs/Pgs 20 -24_IQ 17. pdf http: //www. technologyreview. com/featuredstory/401226/its-time-for-clockless-chips/2/ http: //www-classes. usc. edu/engr/ees/552/coursematerials/ee 552 -H 5. pdf http: //www. youtube. com/watch? v=x. XL 8 o. Ymkt q. M&feature=related http: //www. eetimes. com/electronicsproducts/processors/4082174/ARM-offers-first