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MPC 8360 Micro Controllers 371 -1 -2403 Introduction Fall , 2010 Freescale Confidential Proprietary MPC 8360 Micro Controllers 371 -1 -2403 Introduction Fall , 2010 Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

Course Duties ► Attending all lab sessions is mandatory. (Approvals for not attending a Course Duties ► Attending all lab sessions is mandatory. (Approvals for not attending a lab will be given by the instructors only in special cases like reserve duty etc. ► A short written quiz will be conducted at the beginning of each Lab session. The quiz's material will be published in advance. Failing (less than 60) in the quiz will cause a zero lab grade in that lab session. ► At the end of each lab each student will get a “lab grade” according to his performance and knowledge during the lab. ► Final report submission. ► Final exam – must pass with grade greater than 56. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

Grading Section % Final report 15% Lab execution grade 40% Final quiz 45% Passing Grading Section % Final report 15% Lab execution grade 40% Final quiz 45% Passing the final exam (exam grade > 55) is mandatory. In case of failure, the final course grade will be determined solely based on the exam. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

Syllabus Lab Number Topic Introduction MPC 8360 Architecture ADS introduction CW introduction Programming model Syllabus Lab Number Topic Introduction MPC 8360 Architecture ADS introduction CW introduction Programming model Registers and Instruction Set Assembly language 1 Breaking the 32 bit Barrier 2 The Load Store Unit 3 Branching and Subroutines 4 Timers 5 Polling & Interrupts 6 DMA 7 Cache memories 8 Final Projext Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

Freescale Semiconductor ►We supply the Freescale Semiconductor ►We supply the "brains" for all kinds of automotive, consumer, industrial, networking and wireless applications. ►More than 20, 000 employees in more than 20 countries worldwide, about 500 employees in Herzelia ISRAEL. Pioneer Receivers Logitech Harmony remote control Toshiba Portable Media Player Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

Course Objectives ►Introduction to the MPC 8360 architecture. ►Assembly language of the Power. PC Course Objectives ►Introduction to the MPC 8360 architecture. ►Assembly language of the Power. PC microprocessor family. ►Real time embedded coding for the MPC 8360. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The MPC 8360 MDS Processor Board ►The MPC 8360 EA MDS Processor Board is The MPC 8360 MDS Processor Board ►The MPC 8360 EA MDS Processor Board is an application development system that provides a complete debugging environment for engineers developing applications for the MPC 8360 series of Freescale processors Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

PC Connection To PC USB Freescale Confidential Proprietary Freescale™ and the Freescale logo are PC Connection To PC USB Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPC 8360 A Simplified Block Diagram E 300 Core DDR/DDR 2 ► The QUICC MPC 8360 A Simplified Block Diagram E 300 Core DDR/DDR 2 ► The QUICC Engine™ block Controller handles communication tasks with the outer world. QUICC Engine ► It supports a wide range of Interrupt Controller communication protocols including ATM, Ethernet, HDLC, TDM, and …. POS. ►The E 300 Core is the system's "brain" it executes ► This block offloads the communication tasks from the core instructions (computer programs) and manages the Communication thereby allowing it to do other Ports interaction between all the sub units. system tasks. ►The core implements a 32 -bit the architecture. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The Core Registers ►General-Purpose Registers (GPRs) 32 user-level GPRs that are 32 bits wide The Core Registers ►General-Purpose Registers (GPRs) 32 user-level GPRs that are 32 bits wide r 0 -r 31 ►Condition Register (CR) The CR is a 32 -bit user-level register that provides a mechanism for testing and branching. The dot (. ) suffix enables the update of the CR register Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer carry bit, overflow bit. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer carry bit, overflow bit. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer The Core Registers ►XER register 32 -bit register contains the summary overflow bit, integer carry bit, overflow bit. The following suffixes can be added to a command: C - records a carry out in CA E - uses CA as an operand O - records an overflow in OV and SO Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

The Core Registers ►Link register (LR) The LR can be used to provide the The Core Registers ►Link register (LR) The LR can be used to provide the branch target address and to hold the return address after branch and link instructions. The LR is 32 bits wide. ►Count register (CTR) The CTR is decremented and tested automatically as a result of branch-and-count instructions. The CTR is 32 bits wide. Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPCxxx Instruction Set Command Variations Instruction Register (IR) Functional Description Affected Registers Freescale Confidential MPCxxx Instruction Set Command Variations Instruction Register (IR) Functional Description Affected Registers Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPCxxx Instruction Set 3 4 5 0 0 add r 3, r 4, r MPCxxx Instruction Set 3 4 5 0 0 add r 3, r 4, r 5 Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPCxxx Instruction Set r 0 = 0 x 00000001 r 4 = 0 x MPCxxx Instruction Set r 0 = 0 x 00000001 r 4 = 0 x 00001000 addi r 4, r 0, 0 x 1 r 4 = ? 0 x 00000001 Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPCxxx Instruction Set EXTS (SIMM) = Extends Signed Immediate r 0 = 0 x MPCxxx Instruction Set EXTS (SIMM) = Extends Signed Immediate r 0 = 0 x 00000001 r 4 = 0 x 00001000 addi r 4, r 0, 0 x. F 000 r 4 = ? 0 x. FFFFF 000 Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM

MPCxxx Instruction Set r 0 = 0 x 00000001 r 4 = 0 x MPCxxx Instruction Set r 0 = 0 x 00000001 r 4 = 0 x 00001000 addi r 4, r 0, 0 x 1000 addis r 4, 0 x 10001000 r 4 = ? Freescale Confidential Proprietary Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. TM