I 2 C BUS ﺍﺭﺍﺋﻪ ﺩﻫﻨﺪگﺎﻥ

I 2 C BUS ﺍﺭﺍﺋﻪ ﺩﻫﻨﺪگﺎﻥ : ﻣﺤﺴﻦ ﻗﻠﻌﻪ ﻧﻮﺋﻲ ﺳﻴﺪ ﻣﺠﺘﺒﻲ ﺷﺎکﺮﻱ

ﻓﻬﺮﺳﺖ : n ﺗﺎﺭﻳﺨچﻪ n ﻣﻨﺎﻓﻊ ﺗﻮﻟﻴﺪ کﻨﻨﺪﻩ ﻭ ﻃﺮﺍﺡ n ﻣﻘﺪﻣﻪ ﺍﻱ ﺑﺮ I 2 C Bus n ﺳﺨﺖ ﺍﻓﺰﺍﺭ n پﺮﻭﺗکﻞ ﺍﺭﺗﺒﺎﻃﻲ n ﺍﻧﻮﺍﻉ ﺍﺳﺘﺎﻧﺪﺍﺭﺩﻫﺎﻱ I 2 C n کﺎﺭﺑﺮﺩﻫﺎﻱ I 2 C

ﺗﺎﺭﻳﺨچﻪ پﺮﻭﺗکﻞ I 2 C ﺩﺭ ﺍﻭﺍﻳﻞ ﺩﻫﻪ 0891 ﺗﻮﺳﻂ ﺷﺮکﺖ Philips ﺍﺑﺪﺍﻉ گﺮﺩﻳﺪ. ﻫﺪﻑ آﻦ ﺩﺭ ﺍﺑﺘﺪﺍ ﻓﺮﺍﻫﻢ کﺮﺩﻥ ﺭﺍﻫﻲ ﺳﺎﺩﻩ ﺟﻬﺖ ﺍﺭﺗﺒﺎﻁ ﻳک CPU ﺑﺎ ﺗﺮﺍﺷﻪ ﻫﺎﻱ ﺟﺎﻧﺒﻲ ﺩﺭ ﻳک ﺩﺳﺘگﺎﻩ TV ﺑﻮﺩ. I 2 C ﺩﺭ ﺣﻘﻴﻘﺖ ﻣﺨﻔﻒ Inter IC Bus ﻣﻲ ﺑﺎﺷﺪ کﻪ ﺑﻪ ﻣﻨﻈﻮﺭ ﻓﺮﺍﻫﻢ کﺮﺩﻥ ﻳک ﻟﻴﻨک ﺍﺭﺗﺒﺎﻃﻲ ﺑﻴﻦ ﻣﺪﺍﺭﺍﺕ ﻣﺠﺘﻤﻊ ﻣﻲ ﺑﺎﺷﺪ.

ﺍﻟﺒﺘﻪ ﺍﻣﺮﻭﺯﻩ ﺍﻳﻦ پﺮﻭﺗکﻞ ﺩﺭ ﺻﻨﻌﺖ ﺑﻪ ﺻﻮﺭﺕ ﻋﻤﻮﻣﻲ پﺬﻳﺮﻓﺘﻪ ﺷﺪﻩ ﺍﺳﺖ ﻭ کﺎﺭﺑﺮﺩ آﻦ ﺍﺯ ﺳﻄﺢ ﺗﺠﻬﻴﺰﺍﺕ ﺻﻮﺗﻲ ﻭ ﺗﺼﻮﻳﺮﻱ ﻧﻴﺰ ﻓﺮﺍ ﺗﺮ ﺭﻓﺘﻪ ﺍﺳﺖ ﺑﻪ گﻮﻧﻪ ﺍﻱ کﻪ ﺷﺮکﺘﻬﺎﻱ گﻮﻧﺎگﻮﻥ ﻣﺎﻧﻨﺪ ، Xicor ،T I ،Intel ، Siemens،SGS Thomson Atmel ،Maxim ﻭ Analog Devices ﺑﻪ ﺭﻭﺷﻬﺎﻱ گﻮﻧﺎگﻮﻥ ﺷﺮﻭﻉ ﺑﻪ ﺳﺎﺯگﺎﺭ کﺮﺩﻥ ﻗﻄﻌﺎﺕ ﺧﻮﺩ ﺑﺎ ﺍﻳﻦ پﺮﻭﺗکﻞ ﻧﻤﻮﺩﻧﺪ.

ﻣﻨﺎﻓﻊ ﻃﺮﺍﺡ ﻭ ﺗﻮﻟﻴﺪ کﻨﻨﺪﻩ

ﻣﻨﺎﻓﻊ ﻃﺮﺍﺡ n ﺍﻳﻦ پﺮﻭﺗکﻞ ﺳﺒﺐ ﺳﻬﻮﻟﺖ ﻭ ﺳﺮﻋﺖ ﺩﺭ ﻃﺮﺍﺣﻲ ﻣﺪﺍﺭﺍﺕ ﻣﻴگﺮﺩﺩ. ﺑﺎ ﺍﻳﻦ پﺮﻭﺗکﻞ ﺑﻪ ﺭﺍﺣﺘﻲ ﻣﻲ ﺗﻮﺍﻥ ﻧﻤﻮﻧﻪ ﺍﻭﻟﻴﻪ ﺭﺍ ﺍﺯ ﺭﻭﻱ ﺑﻠﻮک ﺩﻳﺎگﺮﺍﻡ ﺳﻴﺴﺘﻢ ﺑﺪﺳﺖ آﻮﺭﺩ ، ﺯﻳﺮﺍ : n ﺑﻠﻮک ﺩﻳﺎگﺮﺍﻡ ﻋﻤﻠﻴﺎﺗﻲ کﺎﻣﻼ ﺑﺎ IC ﻫﺎﻱ ﻭﺍﻗﻌﻲ ﻣﻄﺎﺑﻘﺖ ﺩﺍﺭﻧﺪ. n ﺭﺍﺑﻄﻬﺎﻱ I 2 C ﺑﻪ ﺻﻮﺭﺕ on-chip ﻭﺟﻮﺩ ﺩﺍﺭﻧﺪ. n ﻫﻢ ﺍﺯ ﻟﺤﺎﻅ ﻧﺮﻡ ﺍﻓﺰﺍﺭﻱ ﻭ ﻫﻢ ﺳﺨﺖ ﺍﻓﺰﺍﺭﻱ ﻗﺎﺑﻞ کﻨﺘﺮﻝ ﺍﺳﺖ.

n n n IC ﻫﺎ ﺑﺮﺍﺣﺘﻲ ﻣﻲ ﺗﻮﺍﻧﻨﺪ ﺑﻪ ﺍﻳﻦ ﺑﺎﺱ ﺍﻓﺰﻭﺩﻩ ﻳﺎ کﻢ گﺮﺩﻧﺪ. ﻋﻴﺐ ﻳﺎﺑﻲ ﻭ ﺭﻓﻊ آﻦ ﺑﺮﺍﺣﺘﻲ ﺍﻣکﺎﻥ پﺬﻳﺮ ﺍﺳﺖ. ﺯﻣﺎﻥ ﻃﺮﺍﺣﻲ ﻧﺮﻡ ﺍﻓﺰﺍﺭﻱ ﻧﻴﺰ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ Library ﻫﺎﻳﻲ کﻪ ﻣﻮﺟﻮﺩ ﻫﺴﺘﻨﺪ کﺎﻫﺶ ﻣﻲ ﻳﺎﺑﺪ. ﻭ ﺑﻄﻮﺭ ﻋﻤﻮﻣﻲ : n n ﻣﺼﺮﻑ ﺑﻲ ﻧﻬﺎﻳﺖ کﻢ ﺟﺮﻳﺎﻥ ﺍﻣﻨﻴﺖ ﺩﺭ ﺑﺮﺍﺑﺮ ﻧﻮﻳﺰ ﺑﺴﻴﺎﺭ ﺑﺎﻻ ﻣﺤﺪﻭﺩﻩ ﻭﺳﻴﻊ ﻭﻟﺘﺎژ ﺗﻐﺬﻳﻪ ﺭﻧﺞ ﻭﺳﻴﻊ گﺮﻣﺎﻳﻲ

ﻣﻨﺎﻓﻊ ﺗﻮﻟﻴﺪ کﻨﻨﺪﻩ ﻋﻼﻭﻩ ﺑﺮ ﻣﻨﺎﻓﻊ ﺫکﺮ ﺷﺪﻩ ﺑﺮﺍﻱ ﻃﺮﺍﺡ ﻣﻲ ﺗﻮﺍﻥ ﺑﻪ ﻣﻨﺎﻓﻊ ﺯﻳﺮ ﺑﺮﺍﻱ ﺗﻮﻟﻴﺪ کﻨﻨﺪﻩ ﻧﻴﺰ ﺍﺷﺎﺭﻩ کﺮﺩ : n ﺩﻭ ﺳﻴﻤﻪ ﺑﻮﺩﻥ آﻦ ﺳﺒﺐ ﺳﺎﺩگﻲ ﻭ کﻮچک ﺷﺪﻥ PCB ﻫﺎ گﺮﺩﻳﺪ. n ﺣﺬﻑ Decoder ﻫﺎﻱ آﺪﺭﺱ. n ﻗﺎﺑﻠﻴﺖ ﺍﺭﺍﺋﻪ ﺩﺭ Package ﻫﺎﻱ کﻮچک.

ﺧﻼﺻﻪ ﺍﻱ ﺑﺮ I 2 C ﻭ ﻣﺸﺨﺼﺎﺕ کﻠﻲ آﻦ

ﻣﻘﺪﻣﻪ : ﺍﻳﻦ ﺑﺎﺱ ﺑﻄﻮﺭ ﻓﻴﺰﻳکﻲ ﺩﻭ ﺧﻂ ﻓﻌﺎﻝ ﺯﻳﺮ ﺭﺍ ﺩﺍﺭﺍ ﻣﻲ ﺑﺎﺷﺪ: n ) Serial Data line (SDA Serial Clock line (SCL) n ﺩﺭ ﺍﻳﻦ ﺑﺎﺱ ﻫﺮ ﻗﻄﻌﻪ ﻣﺘﺼﻞ ﺑﻪ ﺑﺎﺱ ﺩﺍﺭﺍﻱ آﺪﺭﺱ ﻳکﺘﺎﺳﺖ کﻪ ﻫﺮ کﺪﺍﻡ ﻣﻲ ﺗﻮﺍﻧﻨﺪ ﺑﻪ ﺻﻮﺭﺕ گﻴﺮﻧﺪﻩ ﻳﺎ ﻓﺮﺳﺘﻨﺪﻩ ﻭ ﻳﺎ ﻫﺮ ﺩﻭ ﻋﻤﻞ کﻨﻨﺪ. ﻫﻤچﻨﻴﻦ ﺩﺭ ﺍﻳﻦ ﺑﺎﺱ ﻣﻲ ﺗﻮﺍﻥ ﻳک ﻳﺎ چﻨﺪ Master ﺩﺍﺷﺖ.

ﺩﺭ ﺣﺎﻟﺖ چﻨﺪ Master ﺑﻮﺩﻥ ﺩﺭ ﺍﻳﻦ پﺮﻭﺗکﻞ ﺩﻭ ﺑﺤﺚ ﺯﻳﺮ ﻣﻄﺮﺡ ﻣﻲ ﺑﺎﺷﺪ: Arbitration : n ﻓﺮآﻴﻨﺪ ﺍﻧﺘﺨﺎﺏ ﻳک Master ﺑﺮﺍﻱ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ. Bus Synchronization : n ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ clock ﺑﺮﺍﻱ ﺩﻭ ﻳﺎ چﻨﺪ ﺩﺳﺘگﺎﻩ ﻣﺘﻔﺎﻭﺕ کﻪ ﺑﻪ ﻳک ﺑﺎﺱ ﻣﺘﺼﻞ ﻣﻲ ﺑﺎﺷﺪ.

Bus Hardware n n ﺍﻳﻦ ﻧﻮﻉ ﺑﺎﺱ ﺩﺍﺭﺍﻱ ﺧﻄﻮﻁ SDA ﻭ SCL ﺑﻪ ﺻﻮﺭﺕ ﺩﻭ ﺟﻬﺘﻪ ﻣﻲ ﺑﺎﺷﺪ. ﺑﻪ ﻫﻤﻴﻦ ﺧﺎﻃﺮ ﻣﻲ ﺗﻮﺍﻥ ﺑﻪ ﺻﻮﺭﺕ ﺩﺍﺧﻠﻲ ﻳﺎ ﺧﺎﺭﺟﻲ آﻨﻬﺎ ﺭﺍ ﺩﺭﺍﻳﻮ کﺮﺩ. ﺑﺮﺍﻱ ﺟﻠﻮگﻴﺮﻱ ﺍﺯ ﺗﺎﺛﻴﺮ ﻧﺎﻣﻄﻠﻮﺏ ﻗﻄﻌﺎﺕ ﻣﻌﻴﻮﺏ ﺑﺮ ﺭﻭﻱ ﺑﺎﺱ ﺍﺯ ﺗکﻨﻴکﻬﺎﻱ open-drain output ﻭ open-collector output ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ.

n ﺩﺭ ﺍﻳﻦ ﺑﺎﺱ ﺧﻄﻮﻁ SDA ﻭ SCL ﺍﺯ ﻃﺮﻳﻖ ﻣﻘﺎﻭﻣﺘﻬﺎﻱ pull-up ﻭﻳﺎ current-source ﻫﺎ ﺑﻪ ﻳک ﻣﻨﺒﻊ ﻭﻟﺘﺎژ ﻣﺜﺒﺖ ﻣﺘﺼﻞ ﻣﻲ ﺑﺎﺷﻨﺪ. n ﺩﺭ ﺍﻳﻦ ﺻﻮﺭﺕ ﻫﻨگﺎﻣﻲ کﻪ چﻴﺰﻱ ﺑﺮ ﺭﻭﻱ ﺧﻂ ﺍﺗﻔﺎﻕ ﻧﻤﻲ ﺍﻓﺘﺪ ﺍﻳﻦ ﺧﻄﻮﻁ ﺩﺭ ﻭﺿﻌﻴﺖ ﻣﻨﻄﻘﻲ HIGH ﻗﺮﺍﺭ ﺩﺍﺭﻧﺪ.

n ﻫﺮ چﻨﺪ کﻪ ﺗکﻨﻴک ﺫکﺮ ﺷﺪﻩ ) (open-collector ﺩﺍﺭﺍﻱ ﻣﺰﻳﺖ ﺍﺭﺍﺋﻪ ﺷﺪﻩ ﺑﻮﺩ ﻭﻟﻲ ﺍگﺮ ﺑﺎﺱ ﻃﻮﻻﻧﻲ ﺷﻮﺩ ﺗﺎﺛﻴﺮﺍﺗﻲ ﺑﺮ ﺭﻭﻱ ﺳﺮﻋﺖ ﺍﻧﺘﻘﺎﻝ ﺩﺍﺩﻩ ﻫﺎ ﻣﻲ گﺬﺍﺭﺩ. n ﺧﻄﻮﻁ ﻃﻮﻻﻧﻲ ﺳﺒﺐ ﺍﻳﺠﺎﺩ ﻳک ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ﻣﻲ گﺮﺩﺩ کﻪ ﺑﺎ ﻳک ﻣﻘﺎﻭﻣﺖ pull-up پﺴﻴﻮ ﻳک ﺛﺎﺑﺖ ﺯﻣﺎﻧﻲ RC ﺗﻮﻟﻴﺪ ﻣﻲ گﺮﺩﺩ کﻪ ﺑﺮ ﺭﻭﻱ ﺷکﻞ ﺳﻴگﻨﺎﻝ ﺗﺎﺛﻴﺮ ﺧﻮﺍﻫﺪ گﺬﺍﺷﺖ.

• ﻫﻤچﻨﻴﻦ ﺩﺭ ﺳﺮﻋﺘﻬﺎﻱ ﺯﻳﺎﺩ ﻣﻤکﻦ ﺍﺳﺖ ﻧﻮﻳﺰﻫﺎﻱ ﺳﻮﺯﻧﻲ ﺑﺮ ﺭﻭﻱ ﺳﻴگﻨﺎﻝ ﻇﺎﻫﺮ گﺮﺩﺩ کﻪ ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﻣﻨﻄﻖ ﻣﻮﺟﻮﺩ ﻣﻤکﻦ ﺍﺳﺖ ﺍﻳﺠﺎﺩ ﺧﻄﺎ کﻨﺪ.

n ﺩﺍﺩﻩ ﻫﺎ ﺑﺮ ﺭﻭﻱ ﺍﻳﻦ ﺑﺎﺱ ﺑﺎ ﺳﺮﻋﺘﻬﺎﻱ ﺯﻳﺮ ﻗﺎﺑﻞ ﺟﺎﺑﺠﺎﻳﻲ ﻣﻲ ﺑﺎﺷﻨﺪ: : Standard-mode n : Fast-mode n ﺣﺪﺍکﺜﺮ 100 Kbit/s ﺣﺪﺍکﺜﺮ 004 Kbit/s : High Speed-mode n ﺣﺪﺍکﺜﺮ 3. 4 Mbit/s ﻣﺤﺪﻭﺩﻳﺖ ﺍﻣپﺪﺍﻧﺴﻲ ﺧﻂ ﻧﻴﺰ 400 pf ﻣﻲ ﺑﺎﺷﺪ.

ﻣﺸﺨﺼﺎﺕ کﻠﻲ n ﺭﻧﺞ ﻓﺮکﺎﻧﺴﻲ : n ﺑﺴﺘﻪ ﺑﻪ ﻧﻮﻉ آﻦ ﺗﺎ 3. 4 Mbit/s ﻧﻴﺰ کﺎﺭ ﻣﻲ کﻨﺪ. n ﺭﻧﺞ ﺗﻐﺬﻳﻪ : 2. 5 n ﺗﺎ 5. 5 ﻭﻟﺖ ﻳﺎ 7. 2 ﺗﺎ 5. 5 ﻭﻟﺖ ﻭ ﺑﺎ ﻭﺳﺎﻳﻞ ﺟﺪﻳﺪ 3. 2 ﺗﺎ 5. 5 ﻭﻟﺖ ﻭ ﻳﺎ 3 ﺗﺎ 6. 3 ﻭﻟﺖ n ﺭﻧﺞ ﺩﻣﺎﻳﻲ: n ﺍﺯ -04 ﺗﺎ 58 ﺩﺭﺟﻪ ﺳﺎﻧﺘﻴگﺮﺍﺩ ﻭ ﺩﺭ ﺑﻌﻀﻲ ﻣﻮﺍﺭﺩ 0 ﺗﺎ 07 ﻳﺎ 0 ﺗﺎ 021 ﺩﺭﺟﻪ ﺳﺎﻧﺘﻴگﺮﺍﺩ

n پﻴﻨﻬﺎﻱ آﺪﺭﺱ ﺳﺨﺖ ﺍﻓﺰﺍﺭﻱ: n ﻣﻌﻤﻮﻻ ﺳﻪ پﺎﻳﻪ )2 (A 0, A 1, A ﺗﻬﻴﻪ ﺷﺪﻩ کﻪ ﺍﺟﺎﺯﻩ ﻣﻲ ﺩﻫﺪ 8 ﻧﻮﻉ ﺍﺯ ﻳک IC ﺩﺭ ﻳک ﺑﺎﺱ ﻣﻮﺟﻮﺩ ﺑﺎﺷﺪ ﻭ ﺗﻨﻬﺎ ﺑﺎ آﺪﺭﺱ ﺩﻫﻲ ﺍﺯ ﻫﻢ ﻣﺘﻤﺎﻳﺰ گﺮﺩﻧﺪ. Package ﻫﺎﻱ ﺍﺭﺍﺋﻪ ﺷﺪﻩ: n ﻗﺒﻼ ﺩﺭ ﺍﻧﻮﺍﻉ SSOP ، DIP ﺍﺭﺍﺋﻪ ﻣﻲ ﺷﺪﻧﺪ. n ﻭﺳﺎﻳﻞ ﺟﺪﻳﺪ ﻓﻘﻂ ﺩﺭ package ﻫﺎﻱ SOP ﻭ TSSOP ﻭ ﻳﺎ ﻫﻤﺮﺍﻩ ﻭﺳﺎﻳﻞ ﺩﻳگﺮ ﺩﺭ TSOP ﻭ MLP ﺍﺭﺍﺋﻪ ﻣﻲ ﺷﻮﻧﺪ.

پﺮﻭﺗکﻞ ﺍﻧﺘﻘﺎﻝ ﺩﺍﺩﻩ ﺩﺭ I 2 C BUS

ﺍﻧﺘﻘﺎﻝ ﺑﻴﺖ : n n ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺗکﻨﻮﻟﻮژﻲ ﻭﺳﺎﻳﻞ ﻣﺮﺗﺒﻂ ﺑﺎ I 2 C ﺳﻄﻮﺡ ﺻﻔﺮ ﻭ ﻳک ﻣﻨﻄﻘﻲ ﺛﺎﺑﺖ ﻧﻴﺴﺘﻨﺪ ﻭ ﻭﺍﺑﺴﺘﻪ ﺑﻪ ﺳﻄﺢ ﺗﻐﺬﻳﻪ VDD ﻣﻴﺒﺎﺷﺪ. ﻫﺮ پﺎﻟﺲ ﺳﺎﻋﺖ ﻧﻴﺰ ﺑﺮﺍﻱ ﺍﻧﺘﻘﺎﻝ ﻳک ﺑﻴﺖ ﺗﻮﺳﻂ Master ﺗﻮﻟﻴﺪ ﻣﻲ گﺮﺩﺩ. ﺗﻌﻴﻴﻦ ﺍﻋﺘﺒﺎﺭ ﻳک : Bit n ﺳﻄﻮﺡ HIGH ﻳﺎ LOW ﺑﺮﺍﻱ SDA ﺗﻨﻬﺎ ﺯﻣﺎﻧﻲ ﻣﻲ ﺗﻮﺍﻧﺪ ﺗﻐﻴﻴﺮ کﻨﺪ کﻪ SCL ﺩﺭ ﺳﻄﺢ LOW ﺑﺎﺷﺪ.

ﻭﺿﻌﻴﺘﻬﺎﻱ Start ﻭ: Stop n n n ﻳک ﺗﻐﻴﻴﺮ ﻭﺿﻌﻴﺖ ﺍﺯ ﺳﻄﺢ high ﺑﻪ low ﺑﺮ ﺭﻭﻱ SDA ﻭﻗﺘﻲ کﻪ SCL ﺩﺭ ﺳﻄﺢ high ﺍﺳﺖ ﺑﻪ ﻋﻨﻮﺍﻥ ﻭﺿﻌﻴﺖ START ﺷﻨﺎﺧﺘﻪ ﻣﻲ ﺷﻮﺩ. ﻳک ﺗﻐﻴﻴﺮ ﻭﺿﻌﻴﺖ ﺍﺯ ﺳﻄﺢ low ﺑﻪ high ﺑﺮ ﺭﻭﻱ SDA ﻭﻗﺘﻲ کﻪ SCL ﺩﺭ ﺳﻄﺢ high ﺍﺳﺖ ﺑﻪ ﻋﻨﻮﺍﻥ ﻭﺿﻌﻴﺖ STOP ﺷﻨﺎﺧﺘﻪ ﻣﻲ ﺷﻮﺩ. ﻭﺿﻌﻴﺖ Start ﻭ Stop ﻫﻤﻴﺸﻪ ﺑﻮﺳﻴﻠﻪ Master ﺗﻮﻟﻴﺪ ﻣﻲ ﺷﻮﺩ.

Start The chip issuing the Start condition first pulls the SDA )data (line low. and next pulls the SCL )clock (line low. Stop The Bus MASTER first releases the SCL and then the SDA line.

ﺗﺸﺨﻴﺺ ﻭﺿﻌﻴﺘﻬﺎﻱ Start ﻭ: Stop n ﺗﺸﺨﻴﺺ ﻭﺿﻌﻴﺘﻬﺎﻱ START ﻭ STOP ﺩﺭ ﺻﻮﺭﺗﻲ کﻪ ﻭﺳﺎﻳﻞ ﻣﺘﺼﻞ ﺑﻪ ﺑﺎﺱ ﺍﺯ ﺳﺨﺖ ﺍﻓﺰﺍﺭ ﺭﺍﺑﻂ ﺑﺮ ﺭﻭﻱ ﺧﻮﺩ ﺍﺳﺘﻔﺎﺩﻩ کﻨﻨﺪ ﺑﺴﻴﺎﺭ ﺭﺍﺣﺘﺘﺮ ﺍﺳﺖ. n ﻣﻴکﺮﻭکﻨﺘﺮﻟﺮ ﻫﺎﻳﻲ کﻪ ﺍﻳﻦ گﻮﻧﻪ ﺳﺨﺖ ﺍﻓﺰﺍﺭ ﺭﺍ ﻧﺪﺍﺭﻧﺪ ﺑﺎﻳﺪ ﺍﺯ SDA ﺣﺪﺍﻗﻞ 2 ﺑﺎﺭ ﺩﺭ ﻫﺮ پﺎﻟﺲ ﺳﺎﻋﺖ ﻧﻤﻮﻧﻪ ﺑﺮﺩﺍﺭﻱ کﻨﻨﺪ ﺗﺎ ﺑﺘﻮﺍﻧﻨﺪ ﺍﻳﻦ ﺗﻐﻴﻴﺮﺍﺕ ﺭﺍ ﺣﺲ کﻨﻨﺪ.

ﺗﻮﻟﻴﺪ پﺎﻟﺲ ﺳﺎﻋﺖ ﻭ ﻣﺴﺌﻠﻪ Arbitration

n ﻫﻤﻪ Master ﻫﺎ پﺎﻟﺲ ﺳﺎﻋﺖ ﺧﻮﺩﺷﺎﻥ ﺭﺍ ﺑﻪ ﻣﻨﻈﻮﺭ ﺍﺭﺳﺎﻝ ﺩﺍﺩﻩ ﻫﺎ ﺑﺮ ﺭﻭﻱ SDA ﺗﻮﻟﻴﺪ ﻣﻲ کﻨﻨﺪ. n ﺍﻣﺎ چﻮﻥ ﺗﻨﻬﺎ ﻳک ﺧﻂ ﺑﺮﺍﻱ clock ﻭﺟﻮﺩ ﺩﺍﺭﺩ ﺑﺎﻳﺴﺘﻲ ﺍﺯ ﻳک ﺣﺎﻟﺖ ﻣﻨﻄﻘﻲ ﺑﺮﺍﻱ ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ clock چﻨﺪ Master ﺍﺳﺘﻔﺎﺩﻩ ﻧﻤﻮﺩ. n ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺧﺎﺻﻴﺖ wired-AND ﺭﺍﺑﻄﻬﺎﻱ I 2 C ﺑﺮ ﺭﻭﻱ SCL ﺍﻧﺠﺎﻡ ﻣﻲ گﺮﺩﺩ.

Arbitration n ﻳک Master ﺗﻨﻬﺎ ﺯﻣﺎﻧﻲ ﻣﻲ ﺗﻮﺍﻧﺪ ﺩﺍﺩﻩ ﻫﺎﻳﺶ ﺭﺍ ﺑﺮ ﺭﻭﻱ SDA ﺍﺭﺳﺎﻝ کﻨﺪ کﻪ ﺍﻳﻦ ﺧﻂ آﺰﺍﺩ ﺑﺎﺷﺪ. n ﻫﻤچﻨﻴﻦ ﺩﺭ ﻫﺮ ﺯﻣﺎﻥ ﺗﻨﻬﺎ ﻳک Master ﻣﻲ ﺗﻮﺍﻧﺪ ﺑﺮ ﺭﻭﻱ ﺑﺎﺱ ﺩﺍﺩﻩ ﺑﻔﺮﺳﺘﺪ. Arbitration n ﺑﺮ ﺭﻭﻱ ﺧﻂ ﺩﺍﺩﻩ ﺗﻨﻬﺎ ﺯﻣﺎﻧﻲ کﻪ پﺎﻟﺲ ﺳﺎﻋﺖ High ﻣﻲ ﺑﺎﺷﺪ ﺍﺗﻔﺎﻕ ﻣﻲ ﺍﻓﺘﺪ. n ﺩﺭ ﺍﻳﻨﺠﺎ ﻧﻴﺰ ﺍﺯ ﺧﺎﺻﻴﺖ wired-AND ﻭﺳﺎﻳﻞ ﻣﺘﺼﻞ ﺑﻪ ﺧﻂ ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ.

n ﺑﺪﻳﻦ ﺻﻮﺭﺕ ﻫﻨگﺎﻣﻲ کﻪ ﻳک Master ﺳﻄﺢ High ﺭﺍ ﺍﺭﺳﺎﻝ ﻣﻲ کﻨﺪ ﺩﺭ ﺣﺎﻟﻲ کﻪ ﺩﻳگﺮ Master ﻫﺎ ﺳﻄﺢ low ﺭﺍ ﺑﺮ ﺭﻭﻱ SDA ﻣﻲ ﻓﺮﺳﺘﻨﺪ ﺳﺒﺐ ﻣﻴﺸﻮﺩ کﻪ ﺳﻄﺢ ﺧﺮﻭﺟﻲ ﺩﺍﺩﻩ ﻗﻄﻊ ﺷﻮﺩ. n ﺍﻳﻦ ﻭﺿﻌﻴﺖ ﻣﻲ ﺗﻮﺍﻧﺪ ﺑﺮﺍﻱ چﻨﺪﻳﻦ ﺑﻴﺖ ﻣﺘﻮﺍﻟﻲ ﺍﺩﺍﻣﻪ ﺩﺍﺷﺘﻪ ﺑﺎﺷﺪ. n ﻫﻨگﺎﻣﻲ کﻪ ﻳک Master ﺣﺎکﻤﻴﺖ ﺧﻮﺩ ﺑﺮ ﺑﺎﺱ ﺭﺍ ﺍﺯ ﺩﺳﺖ ﻣﻲ ﺩﻫﺪ آﻦ ﺭﺍ ﺭﻫﺎ ﻣﻲ کﻨﺪ ﻳﻌﻨﻲ ﺑﺎﺱ ﺭﺍ ﺩﺭ ﺳﻄﺢ High ﺭﻫﺎ ﻣﻲ کﻨﺪ ﺗﺎ ﺗﺎﺛﻴﺮﻱ ﺑﺮ کﺎﺭ ﺩﻳگﺮ Master ﻫﺎ ﻧﺪﺍﺷﺘﻪ ﺑﺎﺷﺪ.

ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ پﺎﻟﺲ ﺳﺎﻋﺖ ﺑﻪ ﻋﻨﻮﺍﻥ handshake n n ﻳک receiver ﻣﻤکﻦ ﺍﺳﺖ ﺩﺭ ﻫﺮ ﺩﻭ ﺳﻄﺢ ﺑﺎﻳﺘﻲ ﻳﺎ ﺑﻴﺘﻲ ﺍﻃﻼﻋﺎﺕ ﺭﺍ ﺩﺭﻳﺎﻓﺖ کﻨﺪ ﻭﻟﻲ ﻧﻴﺎﺯ ﺑﻪ ﺯﻣﺎﻥ ﺑﻴﺸﺘﺮﻱ ﺩﺍﺭﺩ ﺗﺎ ﻳک ﺑﺎﻳﺖ ﺭﺍ ﺫﺧﻴﺮﻩ کﻨﺪ ﻳﺎ ﻳک ﺑﺎﻳﺖ ﺟﺪﻳﺪ ﺭﺍ ﺑﺮﺍﻱ ﺍﺭﺳﺎﻝ ﻓﺮﺍﻫﻢ کﻨﺪ. ﺩﺭ ﺳﻄﺢ ﺑﺎﻳﺘﻲ slave ﻫﺎ ﻣﻲ ﺗﻮﺍﻧﻨﺪ SCL ﺭﺍ ﺑﻌﺪ ﺍﺯ ﺩﺭﻳﺎﻓﺖ ﺩﻳﺘﺎ low ﻧگﻪ ﺩﺍﺭﻧﺪ ﺗﺎ master ﺑﻪ ﺣﺎﻟﺖ ﺍﻧﺘﻈﺎﺭ ﻭﺍﺭﺩ ﺷﻮﺩ. ﺩﺭ ﺳﻄﺢ ﺑﻴﺘﻲ ﻧﻴﺰ ﻳک ﻣﻴکﺮﻭ کﻨﺘﺮﻟﺮ ﻣﻲ ﺗﻮﺍﻧﺪ ﺳﻄﺢ low ﺑﺮﺍﻱ پﺎﻟﺲ ﺳﺎﻋﺖ ﺑﺎﺱ ﺭﺍ ﺍﻓﺰﺍﻳﺶ ﺩﻫﺪ ﺗﺎ ﺳﺮﻋﺖ ﺭﺍ کﺎﻫﺶ ﺩﻫﺪ. Hs-mode ﺗﻨﻬﺎ ﺩﺭ ﺳﻄﺢ ﺑﺎﻳﺘﻲ ﻣﻮﺟﻮﺩ ﺍﺳﺖ.

آﺪﺭﺳﺪﻫﻲ ﺑﻪ ﺻﻮﺭﺕ 7 ﺑ ﻴﺘ ﻲ

n ﻏﻴﺮ ﺍﺯ ﺣﺎﻟﺘﻲ کﻪ ﺑﻪ general call ﻣﻌﺮﻭﻑ ﺍﺳﺖ ﻫﻤﻴﺸﻪ ﺑﻌﺪ ﺍﺯ START ﻫﻔﺖ ﺑﻴﺖ ﺧﻮﺍﻫﻴﻢ ﺩﺍﺷﺖ کﻪ ﻣﺸﺨﺺ کﻨﻨﺪﻩ آﺪﺭﺱ slave ﻣﻮﺭﺩ ﻧﻈﺮ ﺍﺳﺖ ﺑﻌﺪ ﺍﺯ آﻦ ﻧﻴﺰ ﻳک ﺑﻴﺖ کﻢ ﺍﺭﺯﺵ ﺩﻳگﺮ ﺧﻮﺍﻫﻴﻢ ﺩﺍﺷﺖ کﻪ ﺑﻴﺎﻧگﺮ ﺟﻬﺖ پﻴﻐﺎﻡ ﺍﺳﺖ : n ﺻﻔﺮ ﺑﺎﺷﺪ : ﺣﺎﻟﺖ write ﺍﺳﺖ. n ﻳک ﺑﺎﺷﺪ : ﺣﺎﻟﺖ read ﺍﺳﺖ.

n آﺪﺭﺱ ﻳک slave ﺍﺯ ﺩﻭ ﻗﺴﻤﺖ ﺛﺎﺑﺖ ﻭ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪ ﺭﻳﺰﻱ ﺗﺸکﻴﻞ ﺷﺪﻩ ﺍﺳﺖ کﻪ ﺳﺒﺐ ﻣﻲ ﺷﻮﺩ چﻨﺪﻳﻦ ﺩﺳﺘگﺎﻩ ﻳکﺴﺎﻥ ﺩﺭ ﻳک ﺑﺎﺱ ﺩﺍﺷﺘﻪ ﺑﺎﺷﻴﻢ. n n ﻗﺴﻤﺖ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪ ﺭﻳﺰﻱ ﻣﺸﺨﺺ کﻨﻨﺪﻩ ﺣﺪﺍکﺜﺮ ﺍﻳﻦ ﺩﺳﺘگﺎﻫﻬﺎ ﻣﻲ ﺑﺎﺷﺪ کﻪ ﺍﻳﻦ ﻧﻴﺰ ﺑﻪ ﻧﻮﺑﻪ ﺧﻮﺩ ﺑﻪ ﺣﺪﺍکﺜﺮ پﻴﻦ ﺩﺭ ﺩﺳﺘﺮﺱ ﺑﺴﺘگﻲ ﺩﺍﺭﺩ. ﺑﺎﻳﺪ ﺗﻮﺟﻪ ﺩﺍﺷﺖ کﻪ ﺩﻭ ﺩﺳﺘﻪ ﺍﺯ آﺪﺭﺳﻬﺎﻱ (0000 XXX , (1111 XXX ﺑﺮﺍﻱ ﻣﻘﺎﺻﺪ ﺧﺎﺹ ﻧگﻪ ﺩﺍﺷﺘﻪ ﺷﺪﻩ ﺍﻧﺪ.

ﺗﺮکﻴﺐ ﻫﺎﻱ ﻣﺨﺘﻠﻒ ﺑﺮﺍﻱ آﺪﺭﺱ ﺩﻫﻲ

General call address n ﺍﺯ ﺍﻳﻦ ﺣﺎﻟﺖ ﺑﺮﺍﻱ آﺪﺭﺳﺪﻫﻲ ﺗﻤﺎﻣﻲ ﻭﺳﺎﻳﻞ ﻣﺘﺼﻞ ﺑﻪ ﺑﺎﺱ I 2 C ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ. n ﺍگﺮ ﻭﺳﻴﻠﻪ ﺍﻱ ﻧﻴﺎﺯ ﺑﻪ آﺪﺭﺳﺪﻫﻲ ﺩﺍﺷﺘﻪ ﺑﺎﺷﺪ ﺑﻌﺪ ﺍﺯ ﺍﻳﻦ کﺪ ﺑﻪ ﻋﻨﻮﺍﻥ slave-receiver ﻋﻤﻞ ﻣﻲ کﻨﺪ. n ﺍﻣﺎ ﺑﺎﻳﺖ ﺩﻭﻡ ﺩﻭ ﺣﺎﻟﺖ ﺩﺍﺭﺩ: n ﻫﻨگﺎﻣﻲ کﻪ ﺑﻴﺖ کﻢ ﺍﺭﺯﺵ آﻦ ﺻﻔﺮ ﺑﺎﺷﺪ. n ﻫﻨگﺎﻣﻲ کﻪ ﻳک ﺑﺎﺷﺪ.

ﺑﺎﻳﺖ START ﻣﻴکﺮﻭ ﻫﺎ ﻣﻲ ﺗﻮﺍﻧﻨﺪ ﺑﺎ ﺑﺎﺱ ﺑﻪ ﺩﻭ ﺻﻮﺭﺕ ﺍﺭﺗﺒﺎﻁ ﺩﺍﺷﺘﻪ ﺑﺎﺷﻨﺪ: n ﺑﻪ کﻤک ﺭﺍﺑﻂ ﻫﺎﻱ on-chip ﺑﺮﺍﻱ ﺍﺭﺗﺒﺎﻁ ﺑﺎ I 2 C n ﺍﺯ ﻃﺮﻳﻖ ﻧﺮﻡ ﺍﻓﺰﺍﺭ. ﻳک ﻣﻴکﺮﻭ ﺍﺳﺎﺳ ﺑﺎﻳﺴﺘﻲ ﺑﻪ ﺑﺎﺱ ﺩﺳﺘﺮﺳﻲ ﺩﺍﺷﺘﻪ ﺑﺎﺷﺪ، ﺗﻌﺪﺍﺩ ﺩﺳﺘﺮﺳﻲ ﻫﺎﻱ کﻤﺘﺮ ﺳﺒﺐ ﻣﻲ ﺷﻮﺩ کﻪ ﺑﻬﺘﺮ ﺑﺘﻮﺍﻧﺪ کﺎﺭﻫﺎﻱ ﺩﺍﺧﻠﻲ ﺧﻮﺩﺵ ﺭﺍ ﺍﻧﺠﺎﻡ ﺩﻫﺪ.

n ﺩﺭ ﺍﻳﻦ ﻣﻮﺍﺭﺩ ﻣﻲ ﺗﻮﺍﻥ ﺭﻭﺍﻝ ﺷﺮﻭﻉ ﺭﺍ ﺍﺑﺘﺪﺍ ﺍﺭﺳﺎﻝ کﺮﺩ کﻪ ﺯﻣﺎﻥ ﺑﻴﺸﺘﺮﻱ ﻧﺴﺒﺖ ﺑﻪ ﺣﺎﻟﺖ ﻋﺎﺩﻱ ﻃﻮﻝ ﻣﻲ کﺸﺪ. n ﻣﻴکﺮﻭکﻨﺘﺮﻟﺮ ﺩﻳگﺮ ﺑﺎ ﺳﺮﻋﺖ کﻢ ﺍﺯ SDA ﻧﻤﻮﻧﻪ ﺑﺮﺩﺍﺭﻱ ﻣﻲ کﻨﺪ ﺗﺎ ﺍﻳﻨکﻪ ﻳکﻲ ﺍﺯ ﻫﻔﺖ ﺑﻴﺖ ﺻﻔﺮ ﺍﺭﺳﺎﻟﻲ ﺩﺭ ﺍﻳﻦ ﺭﻭﺍﻝ ﺭﺍ ﺗﺸﺨﻴﺺ ﺩﻫﺪ ﺳپﺲ ﺷﺮﻭﻉ ﺑﻪ ﻧﻤﻮﻧﻪ ﺑﺮﺩﺍﺭﻱ ﺑﺎ ﺳﺮﻋﺖ ﺑﺎﻻ ﻣﻲ کﻨﺪ ﺗﺎ ﻭﺿﻌﻴﺖ Sr ﺭﺍ ﺑﻤﻨﻈﻮﺭ ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ ﻣﺠﺪﺩ ﺗﺸﺨﻴﺺ ﺩﻫﺪ.

ﺗﺤﻮﻻﺕ ﺩﺭ I 2 C

ﺗﻮﺳﻌﻪ ﺧﺼﻮﺻﻴﺎﺕ ﺑﺎﺱ: n ﺑﻪ ﺩﻭ ﺩﻟﻴﻞ ﺯﻳﺮ ﻧﻴﺎﺯ ﺑﻪ ﺗﻮﺳﻌﻪ ﺍﺯ ﺣﺎﻟﺖ ﺍﺳﺘﺎﻧﺪﺍﺭﺩ ﺍﺣﺴﺎﺱ گﺮﺩﻳﺪ: n ﺍﺑﺰﺍﺭﻫﺎﻱ ﺟﺪﻳﺪ ﻧﻴﺎﺯ ﺑﻪ ﺳﺮﻋﺘﻬﺎﻱ ﺑﺎﻻﺗﺮ ﺩﺍﺷﺘﻨﺪ. n ﺣﺪﺍکﺜﺮ 211 ﺣﺎﻟﺖ آﺪﺭﺳﺪﻫﻲ ﺩﺭ ﺣﺎﻟﺖ 7 ﺑﻴﺘﻲ ﺑﺴﻴﺎﺭ کﻢ ﺑﻮﺩ. n ﺑﻨﺎﺑﺮﺍﻳﻦ ﺗﺤﻮﻻﺕ ﺯﻳﺮ ﺻﻮﺭﺕ گﺮﻓﺖ: n ﺍﻳﺠﺎﺩ Fast-mode n ﺍﻳﺠﺎﺩ Hs-mode n آﺪﺭﺳﺪﻫﻲ 01 ﺑﻴﺘﻲ

: Fast-mode n ﺯﻣﺎﻥ ﺑﻨﺪﻱ ﺳﻴگﻨﺎﻟﻬﺎﻱ SDA ﻭ SCL ﺗﻄﺒﻴﻖ ﺩﺍﺩﻩ ﺷﺪ. n ﺩﺭ ﻭﺭﻭﺩﻱ آﻨﻬﺎ ﺩﺭ SDA ﻭ SCL ﺳﻴﺴﺘﻢ ﺣﺬﻑ ﻧﻮﻳﺰ ﺳﻮﺯﻧﻲ ﻭ Schmitt trigger ﺭﺍ ﺗﻌﺒﻴﻪ کﺮﺩﻧﺪ. n ﺍگﺮ ﺗﻐﺬﻳﻪ ﻗﻄﻊ ﺷﻮﺩ پﻴﻨﻬﺎﻱ ﻭﺭﻭﺩﻱ ﻭ ﺧﺮﻭﺟﻲ ﺷﻨﺎﻭﺭ ﺷﺪﻩ ﻭ ﺑﺮ ﺭﻭﻱ ﺧﻂ ﺗﺎﺛﻴﺮﻱ ﻧﺪﺍﺭﻧﺪ.

n ﺩﺳﺘگﺎﻫﻬﺎﻱ pull-up ﺧﺎﺭﺟﻲ ﺑﺎﻳﺪ ﺑﺎ ﺯﻣﺎﻥ ﺧﻴﺰ ﺑﺮﺍﻱ ﺍﻳﻦ ﺑﺎﺱ ﺗﻄﺒﻴﻖ ﺩﺍﺩﻩ ﺷﻮﺩ. n ﺑﺮﺍﻱ کﻤﺘﺮ ﺍﺯ 200 pf ﻣﻲ ﺗﻮﺍﻥ ﺍﺯ pull-up ﻫﺎﻱ ﻣﻘﺎﻭﻣﺘﻲ ﺍﺳﺘﻔﺎﺩﻩ کﺮﺩ ﻭ ﺑﺮﺍﻱ ﺑﻴﺸﺘﺮ ﺍﺯ آﻦ ﺍﺯ ﻣﻨﺎﺑﻊ ﺟﺮﻳﺎﻥ ) ﺣﺪﺍکﺜﺮ ) 3 m. A ﻳﺎ ﻣﺪﺍﺭﺍﺕ ﻣﻘﺎﻭﻣﺘﻲ ﺳﻮﺋﻴچﻴﻨگ ﺍﺳﺘﻔﺎﺩﻩ کﺮﺩ.

: Hs-mode n ﺩﺍﺭﺍﻱ ﻳک ﺑﺎﻓﺮ ﺧﺮﻭﺟﻲ open-drain ﺑﺮﺍﻱ ﺳﻴگﻨﺎﻝ SDAH ﻭ ﺗﺮکﻴﺒﻲ ﺍﺯﻣﺪﺍﺭﺍﺕ- open-drain pull-up ،down ﻭ current-source ﺑﺮ ﺭﻭﻱ ﺧﺮﻭﺟﻲ SCLH ﺍﺳﺖ کﻪ ﺯﻣﺎﻥ ﺧﻴﺰ ﺭﺍ ﺑﺮﺍﻱ SCLH کﺎﻫﺶ ﻣﻲ ﺩﻫﺪ. ﺍﻟﺒﺘﻪ ﺩﺭ ﻫﺮ ﻟﺤﻈﻪ ﻓﻘﻂ ﻣﻨﺒﻊ ﺟﺮﻳﺎﻥ ﻳک Master ﻓﻌﺎﻝ ﺍﺳﺖ.

n n Arbitration ﻭ ﻫﻤﺰﻣﺎﻥ ﺳﺎﺯﻱ clock ﻭﺟﻮﺩ ﻧﺪﺍﺭﺩ. Master ﻫﺎ ﺩﺭ ﺍﻳﻦ ﻣﺪ ﺳﻴگﻨﺎﻝ ﺳﺎﻋﺖ ﺳﺮﻳﺎﻝ ﺭﺍ ﺑﺎ ﻧﺴﺒﺖ 1 ﺑﻪ 2 ﺑﺮﺍﻱ ﺳﻄﺢ high ﺑﻪ low ﺗﻮﻟﻴﺪ ﻣﻲ کﻨﻨﺪ کﻪ ﺯﻣﺎﻧﺒﻨﺪﻱ ﺭﺍ کﺎﻫﺶ ﻣﻲ ﺩﻫﺪ. n ﺩﺍﺭﺍﻱ پﻠﻬﺎﻱ ﺩﺍﺧﻠﻲ ﻫﺴﺘﻨﺪ کﻪ ﺑﺮﺍﻱ ﺍﺗﺼﺎﻝ SDAH ﻭ SCLH ﺑﻪ SDA ﻭ SCL ﺩﺭ Fast-mode ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ.

ﻓﺮﻣﺖ ﺍﺭﺳﺎﻝ ﺩﺍﺩﻩ ﻫﺎﻱ ﺳﺮﻳﺎﻝ ﺩﺭ Hs-mode ﺗﻨﻬﺎ ﺑﻌﺪ ﺍﺯ ﻭﺿﻌﻴﺖ ﻫﺎﻱ ﺯﻳﺮ ﺗﻮﻟﻴﺪ ﻣﻲ گﺮﺩﺩ n : n n n ﻭﺿﻌﻴﺖ) Start (S کﺪ Master ﺑﻪ ﺻﻮﺭﺕ 8 ﺑﻴﺘﻲ ) (00001 XXX ﺑﻴﺖ not-Acknowledge

Hs-mode devices at lower speed ﺩﺭ ﺍﻳﻦ ﺣﺎﻟﺖ ﺍﻳﻦ ﺍﺑﺰﺍﺭﻫﺎ ﺩﺭ Fast-mode ﺑﻪ کﺎﺭ ﺧﻮﺩ ﺍﺩﺍﻣﻪ ﻣﻲ ﺩﻫﻨﺪ ﻭ ﺍﺯ ﻫﻤﺎﻥ پﻴﻨﻬﺎﻱ SDAH ﻭ SCLH ﺑﺮﺍﻱ ﺍﻳﻦ ﻣﻨﻈﻮﺭ ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ ﻭ پﻴﻨﻬﺎﻱ SDA ﻭ( SCL ﺩﺭ ﺻﻮﺭﺕ ﻭﺟﻮﺩ( ﺑﺮﺍﻱ ﺩﻳگﺮ کﺎﺭﺑﺮﺩﻫﺎ ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ.

Mixed speed modes on one serial bus ﺩﺭ ﺍﻳﻦ ﺣﺎﻟﺖ ﺍﺯ پﻠﻬﺎﻱ ﺩﺍﺧﻠﻲ ﻭ پﺎﻳﻪ ﻫﺎﻱ SDA ﻭ SCL ﺩﺭ ﻭﺳﺎﻳﻞ High speed ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ.

آﺪﺭﺳﺪﻫﻲ 01 ﺑﻴﺘﻲ

ﺣﺎﻟﺖ 1111 XXX ﺑﺮﺍﻱ ﺍﻳﻦ ﻣﻘﺼﻮﺩ ﺭﺯﺭﻭ ﺷﺪﻩ ﺍﺳﺖ. ﺍﻣﺎ ﺑﺎﺯ ﻫﻢ ﺗﻨﻬﺎ ﺣﺎﻟﺖ 11110 XX ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲ ﺷﻮﺩ ﻭ ﺣﺎﻟﺖ 11111 XX ﺑﺮﺍﻱ ﻣﻘﺎﺻﺪ آﺘﻲ ﺭﺯﺭﻭ ﺷﺪﻩ ﺍﺳﺖ. ﺑﻴﺖ ﺩﻭﻡ ﻧﻴﺰ ﻣﺎﻧﻨﺪ ﺣﺎﻟﺖ 7 ﺑﻴﺘﻲ ﺷﺎﻣﻞ ﻫﻔﺖ ﺑﻴﺖ آﺪﺭﺱ ﻭ ﻳک ﺑﻴﺖ Read/Write ﻣﻲ ﺑﺎﺷﺪ. ﺷکﻠﻬﺎﻱ آﺘﻲ ﺣﺎﻻﺕ ﻣﺨﺘﻠﻒ آﺪﺭﺳﺪﻫﻲ 01 ﺑﻴﺘﻲ ﺭﺍ ﻧﺸﺎﻥ ﻣﻲ ﺩﻫﻨﺪ.

کﺎﺭﺑﺮﺩﻫﺎﻱ I 2 C

ﻣﻴکﺮﻭکﻨﺘﺮﻟﺮﻫﺎ ﺷﺮکﺖ ﻓﻴﻠﻴپﺲ پﺎﻳﻪ ﻭ ﺍﺳﺎﺱ ﻣﻴکﺮﻭ ﻫﺎﻱ ﺧﻮﺩ ﺭﺍ ﺑﺮ ﻣﻌﻤﺎﺭﻱ 15 80 c ﺑﻨﺎ ﻧﻬﺎﺩﻩ ﺍﺳﺖ. ﺑﺎ ﺗﻮﺟﻪ ﺑﻪ ﺳﺎﺧﺘﺎﺭ کﻮچک ﻭ ﺍﺭﺯﺍﻥ ﺍﻳﻦ ﺗﺮﺍﺷﻪ ﻣﻲ ﺗﻮﺍﻥ ﺍﺯ آﻦ ﺩﺭ ﺍکﺜﺮ ﺳﻴﺴﺘﻢ ﻫﺎﻱ کﻨﺘﺮﻟﻲ ﺍﺭﺯﺍﻥ ﻗﻴﻤﺖ ﺍﺳﺘﻔﺎﺩﻩ کﺮﺩ. ﺷﺮکﺖ ﻣﺬکﻮﺭ ﺗﺮﺍﺷﻪ ﻫﺎﻳﻲ ﺩﺭ کﺎﺭﺑﺮﺩﻫﺎﻱ ﻣﺘﻨﻮﻉ ﺍﺭﺍﺋﻪ ﺩﺍﺩﻩ ﺍﺳﺖ.

ﺩﺭ ﻣﺠﻤﻮﻉ ﺍﻳﻦ ﺗﺮﺍﺷﻪ ﻫﺎ ﺷﺎﻣﻞ ) ROM(OTP/Flash ﻭ RAM ﻗﺎﺑﻞ ﺍﻓﺰﺍﻳﺶ ، پﻮﺭﺕ I/O ،I 2 C گﺴﺘﺮﺩﻩ ، ADC ﻭ. . . ﻣﻲ ﺑﺎﺷﻨﺪ.

: ﺣﺎﻓﻈﻪ ﻫﺎﻱ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪ ﺭﻳﺰﻱ ﺩﺭ ﻗﺎﻟﺐ ﻫﺎﻱ ﻣﺨﺘﻠﻔﻲ ﺍﺭﺍﺋﻪ ﻣﻲ ﺷﻮﻧﺪ ﻧﻈﻴﺮ ISP (In-System Programmable) IAP (In-Application Programmable) OTP (One Time Programmable) MTP (Multi Time Programmable)

ﺗﻘﺮﻳﺒﺎ ﺗﻤﺎﻣﻲ ﻣﻴکﺮﻭﻫﺎﻱ ﻓﻴﻠﻴپﺲ I 2 C ﺭﺍ پﺸﺘﻴﺒﺎﻧﻲ ﻣﻲ کﻨﻨﺪ. ﺗﻌﺪﺍﺩﻱ ﻫﻢ پﺮﻭﺗکﻞ CANBus ﺭﺍ پﺸﺘﻴﺒﺎﻧﻲ ﻣﻲ کﻨﻨﺪ ﻣﺎﻧﻨﺪ : 195 87 C ﻟﻴﺴﺖ ﻣﻴکﺮﻭﻫﺎﻱ ﻓﻴﻠﻴپﺲ ﺳﺎﺯگﺎﺭ ﺑﺎ I 2 C

ﻣﻴکﺮﻭکﻨﺘﺮﻟﺮ 255 80 C )86 - (PLCC

8026 CS ﺑﺮﺍﻱ کﺎﺭﺑﺮﺩﻫﺎﻱ ﺷﺒکﻪ ﺑﺎ I 2 C Interface ﺑﻤﻨﻈﻮﺭ پﻴﺎﺩﻩ ﺳﺎﺯﻱ ﺷﺒکﻪ ﻫﺎﻱ Master/Slave

ADUC 831 Micro converter ADC/DAC 21 ﺑﻴﺖ 62 KB Flash memory

ﺍﺭﺗﺒﺎﻁ I 2 C ﺑﺎ232 RS

ﻣﺜﺎﻝ : ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻣﻴکﺮﻭﻫﺎﻱ 1504 AT 89 C 2051/AT 89 C ﺩﺭ ﺍﺭﺗﺒﺎﻁ ﺑﺎ ﻗﻄﻌﺎﺗﻲ ﺑﺎ ﺭﺍﺑﻂ I 2 C

RS 232 & I 2 C servo control IC

Extender , Repeater & Hub ﺍﺯ ﺟﻤﻠﻪ : 69 PCA 9511 -16 , PCA 9518 , P 82 B 715 , P 82 B کﻪ ﻣﺰﺍﻳﺎﻱ ﺯﻳﺮ ﺭﺍ ﺩﺍﺭﺍ ﻫﺴﺘﻨﺪ : 1. ﺍﺟﺎﺯﻩ ﻣﻲ ﺩﻫﻨﺪ کﻪ ﺍﻣپﺪﺍﻧﺲ ﺧﻂ ﺑﻴﺸﺘﺮ ﺍﺯ 400 pf گﺮﺩﺩ. 2. ﻃﻮﻻﻧﻲ ﺷﺪﻥ ﺧﻂ 3. ﺍﻣکﺎﻥ ﻭﺟﻮﺩ ﻣﻨﺎﺑﻊ ﻭ ﺳﻄﻮﺡ ﻣﻨﻄﻘﻲ ﻭﻟﺘﺎژ ﻣﺨﺘﻠﻒ ﺩﺭ ﻳک ﺳﻴﺴﺘﻢ

4. 5. 6. ﺍﻣکﺎﻥ ﺍﻳﺰﻭﻻﺳﻴﻮﻥ ﻧﻮﺭﻱ ﺑﺮﺍﻱ ﺍﻳﻤﻨﻲ ﺑﻴﺸﺘﺮ ﻗﺮﺍﺭ ﺩﺍﺩﻥ کﺎﺭﺗﻬﺎﻱ ﺑﺪﻭﻥ ﻣﻨﺒﻊ ﺗﻐﺬﻳﻪ ﺑﻪ ﺧﻂ ﻓﻌﺎﻝ I 2 C ﺍﻳﺰﻭﻟﻪ کﺮﺩﻥ ﻗﺴﻤﺘﻬﺎﻳﻲ ﺍﺯ ﺳﻴﺴﺘﻢ کﻪ ﻣﻨﺒﻊ ﺗﻐﺬﻳﻪ آﻨﻬﺎ ﺑﻪ ﺩﻻﻳﻠﻲ ﻗﻄﻊ ﻣﻲ ﺷﻮﺩ.