HW SW co-simulation within the MODUS toolset MODUS Project

HW/SW co-simulation within the MODUS toolset MODUS Project FP 7 - 286583 Methodology and Supporting Toolset Advancing Embedded Systems Quality Eclipse Conference Toulouse, May 6 th 2013 MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 1

M 3 Systems: Leading SME in radionavigation n. An independant SME founded in 1999, performing research and engineering in radio navigation and applications n. Activities include but not restrained to: q. Radio navigation technical studies q. Airport applications q. Critical transportations q… n. Implied in several national and European projects. MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 2

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 3

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 4

MODUS project and toolset n. MODUS aims to help SMEs to substantially improve their positioning in the embedded-systems development market n. MODUS is a set of open and customizable methodologies including: q Model verification by guiding the selection of existing open-source model verification engines q Interfacing with standard simulation platforms for HW/SW co-simulation q Software performance-tuning optimization through automated design transformations q Customizable source-code generation towards respecting coding standards and conventions n. MODUS does not aim to be competitive with the vendors of CASE tools that are presently used in embedded software engineering, but to bring the technology to SMEs. MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 5

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 6

Principle and objectives n. Embedded systems design complexity is growing exponentially with more integrated applications and feature MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 7

Principle and objectives n. Y-Chart approach Clear separation between architecture and application Architecture Application Mapping Changes in architecture System Changes in application Analysis Iterative q. Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the approach usually relies on design, simulation, and analysis, of software models of the system i. e. Virtual Platforms MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 8

Principle and objectives n. MODUS approach Architecture Application High level modelling of architecture Model of the application Generation of Virtual Platform Software binary Mapping Changes in architecture “Executable” System Changes in application Cosimulation MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 9

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 10

HW/SW co-simulation workflow n. MODUS full HW/SW co-simulation workflow: Embedded system q Define the hardware architecture q Model the architecture using UML q Generate the System. C virtual platform q Complete and configure the virtual platform q Generate the executable virtual platform q Integrate the SW Binaries in the platform q Co-simulate the executable system q Change the architecture if needed q Re-iterate Changes in architecture Embedded system HW Embedded system SW Architecture modelling Model of the architecture Virtual Platform generation Generated Virtual Platform MODUS software design flow Virtual Platform completion and configuration Changes in application Virtual Platform compilation Executable Virtual Platform SW Binary Mapping “Executable” System Cosimulation MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 11

HW/SW co-simulation workflow n. Architecture modelling using UML Marte q. Structure composite diagram with restrictions on constructs A system is modelled as a set of components interconnected through ports to a bus. q. Class stereotyped with a subset of MARTE Hw. Logical stereotypes and some of their properties Hw. Processor , Hw. Bus (latency), Hw. RAM (latency, size), Hw. IO, Hw. Device, Hw. End. Point MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 12

HW/SW co-simulation workflow n. Virtual Platform generation q. System. C : C++ library for systems modelling, which includes a simulation kernel. Modules, ports, channels, processes, events, specific datatypes… q. TLM 2. 0 : Extension to System. C with the purpose to abstract communications with high level transactions. Suited for the modelling of memory-mapped bus systems. Generic payload, sockets… supporting two coding styles : Loosely Timed and Approximately Timed. MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 13

HW/SW co-simulation workflow n. Virtual Platform generation q. Generation of a Loosely-Timed virtual platform Modules are generated as skeletons to be completed by MODUS users (except Bus and Memories (SRAM), as well as a set of probes). MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 14

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 15

HW/SW co-simulation environment n. HW/SW co-simulation environment Graphical UML modeller MDT Papyrus Generation engine Acceleo UML MARTE model Generated System. C virtual Eclipse plug-ins platform Completion and configuration Eclipse Configured System. C virtual platform Compilation with external tools: Eclipse CDT Visual Studio … q. Built over the Eclipse framework as a set of specific plug-ins MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 16

Summary n. MODUS project and toolset n. Principle and objectives n. HW/SW co-simulation workflow n. HW/SW co-simulation environment n. HW/SW co-simulation demonstration MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 17

Virtual platform demonstration n Completely generated modules q Memory q PLBBus n Generated modules, but completed and configured by the user q. Micro. Blaze q. UART q. Acquisition and tracking q. Positining q “Data transfer” software compiled using Xilinx tools and loaded into the virtual platform memory MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Page 18

Than you for your attention! Yann Leclerc R&D Engineer – M 3 Systems Tel: +33 5 62 23 10 84 Fax: +33 5 62 23 10 81 email: leclerc@m 3 systems. net MODUS Project FP 7 - SME – 2011 - 286583, Eclipse Conference Toulouse, May 6 th 2013 Chafic Jaber, Ph. D Research Engineer – M 3 Systems Tel: +33 5 62 23 10 Fax: +33 5 62 23 10 81 email: jaber@m 3 systems. net Page 19