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Digital HCAL Electronics Status of Electronics Production José Repond for Gary Drake Argonne National Digital HCAL Electronics Status of Electronics Production José Repond for Gary Drake Argonne National Laboratory CALOR 2010 Conference IHEP Beijing, People’s Republic of China May 10 -14, 2010

The DHCAL with Resistive Plate Chamber Project n Development of a hadron calorimeter optimized The DHCAL with Resistive Plate Chamber Project n Development of a hadron calorimeter optimized for Particel Flow Algorithms – Resistive Plate Chambers (RPCs) as active elements – Very fine readout segmentation with 1 x 1 cm 2 pads n Assembled small prototype calorimeter (→ J. Repond) – Many results with cosmic rays and beam particles n Now assembling large size prototype calorimeter (→ L. Xia) – 40 layers interspersed with steel absorber plates – ~400, 000 readout channels – 1 -bit resolution/pad (binary or digital readout) This talk is about the electronic readout system of the prototype caloriometer DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 2

RPC DHCAL Collaboration: 36 People, 7 Institutions Argonne National Laboratory Boston University Mc. Gill RPC DHCAL Collaboration: 36 People, 7 Institutions Argonne National Laboratory Boston University Mc. Gill University Carol Adams Mike Anthony Tim Cundiff Eddie Davis Pat De Lurgio Gary Drake Kurt Francis Robert Furst Vic Guarino Bill Haberichter Andrew Kreps Zeljko Matijas José Repond Jim Schlereth Frank Skrzecz (Jacob Smith) (Daniel Trojand) Dave Underwood Ken Wood Lei Xia Allen Zhao John Butler Eric Hazen Shouxiang Wu François Corriveau Daniel Trojand UTA Fermilab Alan Baumbaugh Lou Dal Monte Jim Hoff Scott Holm Ray Yarema Jacob Smith Jaehoon Yu IHEP Beijing Qingmin Zhang University of Iowa Burak Bilki Ed Norbeck David Northacker Yasar Onel RED = Electronics Contributions GREEN = Mechanical Contributions BLUE = Students BLACK = Physicists DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 3

Brief Overview of System DHCAL Electronics – Status & Plans G. Drake – May Brief Overview of System DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 4

General Electronics System Specifications n Front-end instrumentation to use 64 -channel custom ASIC – General Electronics System Specifications n Front-end instrumentation to use 64 -channel custom ASIC – 1 cm 2 pads, 1 meter 2 planes, 40 planes, 400, 000 channels n Front-end channel consists of amplifier/shaper/discriminator n Single programmable threshold 1 bit dynamic range – Threshold DAC has 8 -bit range – Common threshold for all 64 channels per ASIC n 2 gain ranges – High gain for GEMs (10 f. C - ~200 f. C signals) – Low gain for RPCs (100 f. C - ~10 p. C signals) n 100 n. Sec time resolution n Timestamp each hit – 1 second dynamic range 24 bits @ 100 n. Sec – Synchronize timestamps over system n Data from FE consists of hit pattern in ASIC + timestamp – 24 bit timestamp + 64 hit bits = 88 bits (+ address, error bits, etc. ) – Readout format: 16 bytes per ASIC DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 5

General Electronics System Specifications (Continued) n Capability for Self Triggering Noise, Cosmic rays, Data General Electronics System Specifications (Continued) n Capability for Self Triggering Noise, Cosmic rays, Data errors n Capability for External Triggering Primary method for test beam – 20 -stage pipeline 2 m. Sec latency @ 100 n. Sec n [Capability of FE to source prompt Trigger Bit (simple OR of all disc. )] n Capability to store up to 7 triggers in ASIC output buffer (FIFO) n Design for 100 Hz (Ext. Trig) nominal rate n Deadtimeless Readout (within rate limitations) n Zero-suppression implemented in front-end n On-board charge injection with programmable DAC n Design for 10% occupancy n Concatenate data in front-ends n Use serial communication protocols n Slow controls separate from data output stream n Compatibility with CALICE DAQ DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 6

Detector Configuration Chamber Construction: ASIC Front-End PCB Communication Link Conductive Epoxy Glue Pad Board Detector Configuration Chamber Construction: ASIC Front-End PCB Communication Link Conductive Epoxy Glue Pad Board Signal pads Mylar 8. 6 mm Resistive paint 0. 85 mm glass 1. 2 mm gas gap Fishing line spacers HV 1. 15 mm glass Resistive paint Mylar Aluminum foil (Not to Scale) Grounding is important… DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 7

System Block Diagram 24 ð Both on Same PCB DHCAL Electronics – Status & System Block Diagram 24 ð Both on Same PCB DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 8

System Physical Implementation n Plane Construction – A plane consists of 3 independent chambers System Physical Implementation n Plane Construction – A plane consists of 3 independent chambers – See Lei Xia’s talk Friday Chambers – 3 per plane Gas Outlet Gas Inlet HV Square Meter Plane (3) 32 cm X 96 cm chambers DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 9

System Physical Implementation (Cont. ) Power Chambers – 3 per plane Serial Communication Link System Physical Implementation (Cont. ) Power Chambers – 3 per plane Serial Communication Link - 1 per Front-End Bd Data Concentrator Front End Board with DCAL Chips & Integrated DCON Square Meter Plane (2) 32 cm X 48 cm Front End Boards per Chamber n Front End Board – (24) 64 -Ch Chips / Bd – 1536 Channels / Bd DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 10

System Physical Implementation (Cont. ) n Pad Boards – Glued to Front End Board System Physical Implementation (Cont. ) n Pad Boards – Glued to Front End Board using Conductive Epoxy – Gluing done after FEB assembly and check out – More in Lei Xia’s Talk on Friday DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 11

System Physical Implementation (Cont. ) Data Collectors – Need 10 VME Interface Optional GPS System Physical Implementation (Cont. ) Data Collectors – Need 10 VME Interface Optional GPS IN Ext. Trig In Data Concentrator Chambers – 3 per plane MASTER TTM To PC Front End Board with DCAL Chips & Integrated DCON SLAVE TTM VME Interface 6 U VME Crate Timing Module -Double Width -- 16 Outputs Data Collectors – Need 10 To PC Square Meter Plane Serial Communication Link - 1 per Front-End Bd 6 U VME Crate DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 12

System Physical Implementation (Cont. ) n Square meter plane mounted on cassette using prototype System Physical Implementation (Cont. ) n Square meter plane mounted on cassette using prototype Front End Boards DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 13

Some Numbers n Planes – 38 planes in m 3 n Detector Granularity – Some Numbers n Planes – 38 planes in m 3 n Detector Granularity – 1 cm 2 pads – 10, 000 pads/plane – 380, 000 ch total n Front End Boards – 6 per plane – 228 total (+ spares) n Chips – 64 ch/chip n Chip Rates (@ 1 TS/trig) n DCON Output Rates – 1 bit/100 n. Sec out of chips – 16 bytes/TSlice/chip – 24 chips/FEB – 121 bits/TSlice – 100 n. Sec/bit – 5472 chips total • 64 hit bits 8 bytes – 12. 8 u. Sec/TSlice/chip n Data Collectors • 24 bits timestamp 3 bytes – 78 K Tslices/sec max rate – 12 FEB/Data Coll. • 3 ctrl bit/byte – Zero Suppression helps – 12. 1 u. Sec/TS/Chip – 20 Data Coll. total – Example: – 24 chips operate in parallel n VME Crates • 4 chips hit/event avg – 82. 6 KHz max average – 2 crates total (1 per side) • Max event rate: 19 KHz – event rate Use Zero Suppression… – WC: 78 K / 24 = 3. 2 KHz DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 14

Power Distribution System n Cubic meter detector power requirements: n Power Numbers – 3 Power Distribution System n Cubic meter detector power requirements: n Power Numbers – 3 A / FEB @ 5 V – 100 m. A/ASIC @ 2. 5 V – 40 planes * 6 FEBs/plane * 3. 0 amps/FEB = 720 amps at 5 V – 3. 9 m. W/ch n Solution: – 3 A/FEB @ 5 V (ASICs run at 2. 5 V) – 5 Wiener PL 508 chassis – 15 W/FEB – Each PL 508 has six independent 5 V at 30 amp supplies – 5 PL 508 * 6 PS/PL 508 * 30 amps/PS = 900 amps total ampacity – 90 W/plane – 3. 6 KW/cubic meter – Operate at ~80% of capacity – 1 Wiener supply powers 8 Front End Boards DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 15

Power Distribution System (Cont. ) n Need Power Dist. Box to distribute voltages to Power Distribution System (Cont. ) n Need Power Dist. Box to distribute voltages to Front End Boards n Rack Configuration – Power supplies will fit into one rack n Power Distribution – Custom distribution boxes, with fuses, safe wiring, etc. Wiener PL 508 30 A 30 A 30 A Distribution Box To 1 Front-End Bd 3 A Nominal DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 16

Production Quantities Item DCAL Chips Needed for Detector Needed for Tail Catcher Spares Teststands Production Quantities Item DCAL Chips Needed for Detector Needed for Tail Catcher Spares Teststands Total 5472 1008 2164 0* 8644 Front End Bds 228 42 10 0* 280 Data Collectors 20 4 3 1 28 VME Crates 2 0 1 1 4 VME Processors 2 0 1 1 4 Timing Module 3 0 2 1 6 Wiener Power Supplies 5 2 1 0 8 Power Dist. Boxes 5 2 1 0 8 DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 17

Status of System Components to Date DHCAL Electronics – Status & Plans G. Drake Status of System Components to Date DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 18

Status of DCAL 3 Production n Chip Fabrication: – 11 wafers, 10, 300 chips, Status of DCAL 3 Production n Chip Fabrication: – 11 wafers, 10, 300 chips, fabricated, packaged, inhand n Chip Testing – All chips tested – Results • 8644 good parts 84% yield Average ð Complete DCAL 3 Layout Robotic Chip Tester Chip Storage (~1/2 total) DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 19

Status of Front End Board Production Found 3 problems with prototype FEB - LVDS Status of Front End Board Production Found 3 problems with prototype FEB - LVDS outputs of DCON FPGA not true LVDS had common mode component - We had a single-ended clock line between receiver & FPGA, ~10 cm - We found a stability problem with the PLL in the FPGA ð Caused relatively rare errors in data collection - ~1 E-8 ð Required additional iterations in design of prototype to find & fix 8 -layer FE-board (3 layers shown) DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 20

Status of Front End Board Production (Cont. ) n Status today – All problems Status of Front End Board Production (Cont. ) n Status today – All problems in layout fixed – All problems in firmware fixed – System has been run in Cosmic Ray Teststand for long periods with no errors – System has been run in “Torture Mode” with no errors ð Production assembly of PCBs now in progress DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 21

Status of Front End Board Production (Cont. ) n A Few Results High gain Status of Front End Board Production (Cont. ) n A Few Results High gain Entries: 1536 Average: 6. 19 RMS: 2. 97 Channel Uniformity for Threshold Scans Low gain Entries: 1536 Average: 2. 04 RMS: 2. 41 High Gain: ~0. 3 f. C / THR_DAC_CNT 75 f. C Range Factor of 6. 4 Measurements of Noise Floor Single channel measurements, Ext. Trig, , No Pad Bd, No Chamber, No HV Entire Front End Board, 1536 Channels DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing Low Gain: ~1. 9 f. C / THR_DAC_CNT 480 f. C Range Operate ~ 190 f. C for RPC 22

Status of Data Collector Production n Production – 30 boards fabricated & assembled – Status of Data Collector Production n Production – 30 boards fabricated & assembled – Testing complete – All delivered to Argonne ð Complete Courtesy Eric Hazen, BU DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 23

Status of Timing & Trigger Module (TTM) Production n Status GPS Receiver – Redesign Status of Timing & Trigger Module (TTM) Production n Status GPS Receiver – Redesign completed Input • Add outputs: 8 16 • Makes double-width • Add capability to use as MASTER or SLAVE – Set a bit to select – Production • Need 3 for detector • Fabrication done • 1 st assembled (in house) Trigger Inputs ð Almost complete DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 24

Schedule & Plans DHCAL Electronics – Status & Plans G. Drake – May 10 Schedule & Plans DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 25

Schedule & Plans n Projected Production Schedule – ~Produce 1 plane per day, all Schedule & Plans n Projected Production Schedule – ~Produce 1 plane per day, all phases of production Component Mar Apr May Jun July Aug Sept Oct Nov Dec DCAL Chips Front End Bd Data Collector PCB Fab PCB Assembly Checkout Gluing Checkout Crates Timing Module PCB Fab Assmbly Checkout Power Supplies Power Dist. Box System Tests @ FNAL Assembly Checkout Tests in CRTS Install Data Taking DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 26

Summary n We have completed an extensive development program for the electronics of a Summary n We have completed an extensive development program for the electronics of a Digital Hadron Calorimeter (with Resistive Plate Chambers) – The design of the Front End Board was by far the most difficult aspect of the project – The prototype system has been thoroughly tested • Good electronics noise performance Careful layout & circuit design • Good measurement of cosmic rays • Data error rate < 1 E-12 through extensive testing n Production in progress – DCAL ASIC • Checkout complete • 8600 chips in hand 84% yield – Front-end Board & Pad Board • PCB fabrication complete • PCB production assembly in progress (1 st 10 boards this week, >30 boards/week) • Checkout hardware and software in place – Data Collector, Timing Module, Power Dist. Box Production of all in progress ð Begin tests in Cosmic Ray Teststand in May ð Installation & commissioning at FNAL testbeam in September ð 1 st test beam run to start on October 8 th ð 1 st beam tests of CALICE technical prototype DHCAL Electronics – Status & Plans G. Drake – May 10 -14, 2010 – CALOR 2010 Conference – Beijing 27