Central core (2 km) Remote station
Environment: type and properties of input/output information. Current Embedded Systems are becoming multi-core multi-platform (sub-)systems, executing multiple independent applications, mostly in real time, and at low power consumption.
Processors run autonomously and concurrently, and are not abundant as in (homogeneous) cluster or grid computers.
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Questions to be answered at compile- time and run-time:
How can an embedded system be modeled?
Briefly stated LERC deals with
Application developers can rely on sequential imperative program specifications (C/C++/Java); they don’t know what the implementation platform will be. A translator converts such specifications to parallel specifications, possibly including corresponding target implementation platform configurations not pre-defined, using multi-objective optimization techniques. A compiler converts the parallel specifications to implementation specifications, possibly including the synthesis of the not pre-defined implementation platform configuration.
An FPGA Co. MPSo. C is (much) more flexible, and (much) cheaper than a custom designed Co. MPSo. C. An FPGA Co. MPSo. C comprising many software and hardware processing components in a run-time re-configurable network is feasible. Limitations are only coming from restricted on-chip memory resources.
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Explore, modify, select instances High-level Models Common XML Interface RTL-level Models Multiprocessor System on Chip – Synthesizable VHDL and C/C++ code for processors
Platform Spec in XML Mapping Spec in XML KPN In XML
However, other – given platforms – can be target platforms as well. Examples are Intel multi-core platforms, the IBM Cell processor platform, and GPU platforms. Lerc’s approach is independent of specific target platforms, but can deal with various platforms.
You can go through this presentation again at http: //www. liacs. nl/~cserc/EMBSYST 2008/challenges/