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APPLICATION OF DESIGN PATTERNS FOR HARDWARE DESIGN Authors: R. Damaševičius, G. Majauskas, V. Štuikys APPLICATION OF DESIGN PATTERNS FOR HARDWARE DESIGN Authors: R. Damaševičius, G. Majauskas, V. Štuikys Speaker: Prof. Vytautas ŠTUIKYS, Software Engineering Department, Kaunas University of Technology, Kaunas, Lithuania E-mail: [email protected] ktu. lt Phone: 370 -37 -300399

Content Reuse Context & Motivation l Domain Analysis: Framework and Findings l l l Content Reuse Context & Motivation l Domain Analysis: Framework and Findings l l l l Soft IP-Based System-Level Design Processes & Design Patterns (DP): Their Relationship Implementation Using Metaprogramming (MPG) MPG and DP-Based Design Framework Experiments Evaluation and Problems Conclusions 2

Reuse Context & Aim of the Presentation l Reuse equations: (1) Promises = Quality Reuse Context & Aim of the Presentation l Reuse equations: (1) Promises = Quality + Productivity + Time-To-Market (2) Reuse = Domain content + Technology +. . . (3) Technology = Component-based reuse + Generative reuse (4) Activities = Design Domain Analysis (DDA) +. . . l Our aim: To bridge DDA with automatic tools 3

Domain Analysis: A General Framework 4 Domain Analysis: A General Framework 4

Domain Analysis: A Summary of Findings l Trends: n n l Well-understood sub-domains: n Domain Analysis: A Summary of Findings l Trends: n n l Well-understood sub-domains: n n l Shift towards Integration-based Design Blurring boundaries between HW & SW design Communication-based design using well-proven communication models (Handshake, FIFO, etc. ) Fault-tolerant design using well-proven redundancy models (TRM, etc. ) Solutions for common design problems (System. Level Design Processes and Design Patterns) n n Explicit separation of variant and invariant parts Multi-language approach 5

HW Design Processes Based on Soft IP Register Transfer-Level Design Processes l System-Level Design HW Design Processes Based on Soft IP Register Transfer-Level Design Processes l System-Level Design Processes l 6

Layers of System-Level Design Processes l Specification layer: domain analysis and specification of design Layers of System-Level Design Processes l Specification layer: domain analysis and specification of design problems n l Generalization layer: analysis and specification of generic design solutions n n l inheritance, encapsulation, etc. separation of concerns composition Implementation layer: solutions of design problems using reuse technology n wrapping, etc. 7

Design Pattern: Definitions l The design pattern is. . . n … “descriptions of Design Pattern: Definitions l The design pattern is. . . n … “descriptions of communicating objects and classes that are customized to solve a general design problem in a particular context” [E. Gamma et al. , 1995] n … “both a description of a thing which is alive, and a description of the process which will generate that thing” [C. Alexander, 1979] 8

System-Level Design Processes and Design Patterns: Relationship l Our definition: n l A System-level System-Level Design Processes and Design Patterns: Relationship l Our definition: n l A System-level HW design process is a common well-defined HW design activity aimed at designing a system from soft IPs at a high level of abstraction Our definition: n A HW Design Pattern is the UML-based specification of a System-Level HW Design Process based on a well-proven design model 9

Design Patterns in Hardware Design l Pattern-like solutions proposed by others n n n Design Patterns in Hardware Design l Pattern-like solutions proposed by others n n n l Design patterns adapted from SW design: n n l models of computation/control: Finite State Machine communication models: protocol, bus, communication co -processor wrappers: reliability, bus, protocol, memory wrappers Abstract Factory, State [Yoshida] Resource Manager [Vanmeerbeeck et al. ] Composite, Object Adaptor, Abstract Factory and Decorator [Åström et al. ] Singleton [Charest and Aboulhamid] New HW design patterns: n Bus-Protocol, DLX Processor Architecture [Doucet and Gupta] 10

Application of the OO Concepts for VHDL n n n Abstract class (interface) - Application of the OO Concepts for VHDL n n n Abstract class (interface) - VHDL entity A class that implements an abstract class - VHDL architecture The composition relationship - VHDL port map statement Class attributes - VHDL ports and signals Class methods –VHDL processes or procedures 11

Wrapper Design Pattern l Allows adapting an interface and behavior of the IP component Wrapper Design Pattern l Allows adapting an interface and behavior of the IP component to the context of a given application 12

Specification of Design Patterns Using Metaprogramming l Metaprogramming (MPG): n n l provides a Specification of Design Patterns Using Metaprogramming l Metaprogramming (MPG): n n l provides a means for manipulating with other programs as data at a higher level of abstraction uses two different languages in the same generic specification Metaprogram: a program generator for a narrow domain of application Domain language (DL) (e. g. , VHDL): describes domain functionality l Metalanguage (ML) (e. g. , Java): describes generalization and domain program modifications at a higher level of abstraction l 13

Summary of Metaprogramming Principles l l l CI R S P I MP – Summary of Metaprogramming Principles l l l CI R S P I MP – Component Instance – Requirements for modification/generalization – Separation of concerns – Parameterization – Integration of concerns – Metaprogram 14

Framework of Our Approach: Implementation (0) Design Domain Analysis (DDA): SL Design Process/ Design Framework of Our Approach: Implementation (0) Design Domain Analysis (DDA): SL Design Process/ Design Pattern, Requirements and soft IP (1) Metaprogramming: describe the domain program modifications depending upon the values of the generic parameters (2) Parsing: use the soft IP interface as values of generic parameters for metaprograms (3) ML processing: generate the soft IP wrapper 15

Experiments Based on Well-proven Models l Communication interface synthesis n n l Handshake Wrapper Experiments Based on Well-proven Models l Communication interface synthesis n n l Handshake Wrapper [see paper DAC 03] FIFO Wrapper - next slide [for details INFORMATICA, see Ref. in DAC 03] Fault-tolerant design [submitted, not presented here] n n n Space Redundancy Wrapper Time Redundancy Wrapper Data Redundancy Wrapper 16

FIFO Wrapper Generator: Implementation l FIFO protocol is used in the producer-consumer communication model FIFO Wrapper Generator: Implementation l FIFO protocol is used in the producer-consumer communication model to smoothen bursts in the requests for a service 17

Evaluation of Design Specification l Advantages of using HW Design Patterns: n raise the Evaluation of Design Specification l Advantages of using HW Design Patterns: n raise the level of abstraction n capture the design content immediately and intuitively using UML diagrams n enable the automated design validation and code generation l Shortcomings: n do not provide with a full HW design specification for its implementation 18

Evaluation of MPG-based Implementation l Metaprogramming (MPG): n n n bridges the Design Domain Evaluation of MPG-based Implementation l Metaprogramming (MPG): n n n bridges the Design Domain Analysis with Domain Generators allows to adapt soft IPs to the context of application using well-proven domain models increases the reusability and productivity when customizing third-party soft IPs 19

Problems yet to be solved l l l How the System-Level (SL) Design Processes Problems yet to be solved l l l How the System-Level (SL) Design Processes described as the UML-based HW Design Patterns (DPs) could be (semi-) automatically transformed into metaprograms? How the physical constraints (e. g. , the timing ones) should be reflected in an OO model (DP)? How the entire DP could be directly synthesized to RTL? What is a more precise model for describing correspondence between soft IP-based SL Design Processes and DPs? What is the best way for implementing DPs: MPGbased, OO-based or other? 20

Conclusions The well-proven dimension of a SL Design Process (e. g. wrapping) is a Conclusions The well-proven dimension of a SL Design Process (e. g. wrapping) is a Design Pattern l The Design Pattern brings the design content l Both soft IP and metaprogramming bring technology l Our methodology puts together the design content and technology, thus enabling better reuse, higher quality and productivity l Future work will focus on the discovery of other HW design patterns and the development of the HDL code generators for their implementation l 21

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