5 Packaging Intro Ken Gilleo Ph D

5 Packaging Intro • Ken Gilleo Ph. D • ET-Trends LLC 44% 1

th e Package Chip to PCB Compatibility Rerouting JOINING WIRING DEVICE PROTECTION MEMS 2 Thermal Management Performance Enhancement Reworkability Enable repair PROTECTION Easy Assembly Easy Testability Low Stress Selective Access to Environment Automated Handling Standardization Enable Mechanical Movement

Packaging Change Drivers 1. Miniaturization § § § Area Height Weight 2. Performance § High lead count § High frequency; processors, RF 3. MEMS/MOEMS/Nano; a new technology cluster 3

Devices Nano ~50 Years PERFORMANCE ~50 Years MOEMS Vacuum MEMS Solid State 4 TIME

Basic Package Elements • Base; platform; chip carrier • 1 st Level Interconnect (to chip) • Routing (can be optional) • 2 nd Level Interconnect (to substrate/PCB) • Enclosure; encapsulant • Special features § § 5 Thermal management Ports, windows, other

Packages Element – cont. • Substrate/Platform/Enclosure § Rigid organic; BT, etc. § Flexible organic; polyimide § Ceramic/glass § Metal with insulation § Protection; enclosure, encapsulation, passivation DIELECTRICS • Chip Connections (1 st level) § Wire bond § TAB § Integrated TAB § DCA; Flip Chip DIE CONDUCTORS • PCB Assembly (2 nd level) § § 6 Fusible: solder spheres/balls/bumps Non-fusible: leads, pins, pads CONDUCTORS

Lead Frames • Metal – free standing or pre-inserted into dielectric • Framing structure removed later • Ceramic hermetic; used for MEMS • Plastic Near-hermetic; limited use for MEMS • Finishes for die attach/bonding § § § 7 Ag Pd Au Ni Multiple

Chip Carriers Chip Carrier: a packaging system for electronic chips (IC’s) that provides protection and a practical means of connecting to circuitry. Fan Out: 2 nd Level interconnect fans outward from 1 st level Conductor and Dielectric Fan In: 8 A flex-based package First - 1964

Area Array Packages • Flip Chip • LGA (Land Grid Array); leadless chip carrier, QFN • PGA (Pin Grid Array) • BGA (Ball Grid Array) • Micro-BGA (CSP) 9

Advanced Packaging Types • Advanced BGAs • Flex-Based • Multi. Chip • CSP • Array Molded PRODUCTIVITY • Wafer-Level CSP and FC 10

Flip Chip • Perimeter for small I/O count • Area Array is much more effective MEMS potential Selective underfill 11

Ceramic Packages • Cofired Used for MEMS Hermetic moderately expensive • Cast • Molded • Open (non-hermetic); chip carrier 12

Organic Substrate • Rigid; mostly epoxies (resin-glass) § FR 4 conventional § FR 4 type non-halogenated § BT (Bismaleimide-triazine) § New non-epoxy halogen-free products • Flexible § § 13 Polyimide LCP Limited use for MEMS Non-hermetic Lowest cost

Multi. Chip Packages Single-Plane Cavity type used MEMS + ASIC, other Infineon MEMS mic + ASIC chip 14 Traditional Stacked

Packaging Steps • Bond die (chip) to base; die attach) • 1 st Level connect chip; wire bonding • Enclosure; encapsulant 15

Wire Bonding (WB) • Most common connection • Gold ball bonding dominants (~ 93%) • Features § § Very versatile § Universal method § Fast, automatic, equipment makers keeping pace § Fully mechanical process § Clean; no pollution, waste, hazardous materials § 16 Programmable; handles die and package change Well-suited for MEMS/MOEMS

Package Protection • Fabricated cavity enclosure; metal, plastic, ceramic • Transfer Molding Compounds (solids) • Glob Top; free flow encapsulant • Dam & Fill encapsulants • Cavity fill encapsulants ’t be S an st c MEM Mo for d use • Underfill; 4 basic classes • Underfill + encapsulant • Injection molded cavity packages; near-hermetic 17

BGA encapsulants: for protection & handling DIE Only suitable for capped MEMS CAP MEMS 18

Session Summary • Packaging is very dynamic today • The package is all about metal & dielectrics • Challenges are greater than ever • Chip advances push performance • WLP is finally gathering momentum • MEMS is opening up a new packaging industry 19