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© 2008 BPM Microsystems Confidential and Proprietary © 2008 BPM Microsystems Confidential and Proprietary

Factory Preprogramming Solutions for NAND Flash Devices Dragon Zhang © 2008 BPM Microsystems Confidential Factory Preprogramming Solutions for NAND Flash Devices Dragon Zhang © 2008 BPM Microsystems Confidential and Proprietary

What Is Factory Preprogramming? Ø Factory preprogramming is the writing of initial data content What Is Factory Preprogramming? Ø Factory preprogramming is the writing of initial data content into a non-volatile memory device. Ø The memory devices are usually virgin blanks straight from the semiconductor distributor. Ø At the very least, factory preprogramming provides the “bootstrapping” necessary for the embedded system. © 2008 BPM Microsystems Confidential and Proprietary

Example Preprogrammed Content Ø Store-and-download Sn. D boot loader Ø OS, System Firmware Ø Example Preprogrammed Content Ø Store-and-download Sn. D boot loader Ø OS, System Firmware Ø Preloaded user content: v Applications v Pictures, Music, Movies v GPS Maps Ø Unique / Dynamic content: v Serial Numbers v Network addresses v Encryption keys © 2008 BPM Microsystems Confidential and Proprietary

The Hidden Added Cost Per Device Ø Devices per Hour (DPH) v. The number The Hidden Added Cost Per Device Ø Devices per Hour (DPH) v. The number of successfully preprogrammed devices that a process can produce in an hour. v. Aka Units per Hour. Ø Outsourced Programming Fees v. Additional charge to preprogram your data. v. Price depends on DPH and volume. v$0. 25 - $1. 00 per device typical range. Ø Production beat rate © 2008 BPM Microsystems Confidential and Proprietary

Factory Preprogramming Methods Ø Offline / In-Socket Ø ISP / ICP v. In-house v. Factory Preprogramming Methods Ø Offline / In-Socket Ø ISP / ICP v. In-house v. Outsourced v. Manual v. Automated (Pick & Place) © 2008 BPM Microsystems Confidential and Proprietary v. Via Connected Target System v. Via Test Port (eg JTAG) v. Via In-circuit test (ICT) system

Offline In-Socket Ø Performance Advantage v Isolated Device v Concurrency + Gang v Scalable Offline In-Socket Ø Performance Advantage v Isolated Device v Concurrency + Gang v Scalable Ø Eliminate failures before solder process Ø Easy to outsource. Ø Or, handle in-house. © 2008 BPM Microsystems Confidential and Proprietary

In-Circuit / In-System Ø It’s how the design engineers did it. Ø But you’ll In-Circuit / In-System Ø It’s how the design engineers did it. Ø But you’ll need more than the “Dev. Kit”. Ø Can you reuse your embedded code? Ø 40+ minute programming times are common © 2008 BPM Microsystems Confidential and Proprietary

“This Sounds Like Production’s Problem” Ø What’s all of this have to do with “This Sounds Like Production’s Problem” Ø What’s all of this have to do with designing flash-based products? v. Your NAND driver choices will have an impact on the manufacturability of your product. v. Your decisions on NAND control during the design phase can mean the difference between turn-key factory preprogramming and weeks of delays. It really happens! © 2008 BPM Microsystems Confidential and Proprietary

Preprogramming Considerations - NAND Flash Ø Type v. Is it raw SLC, raw MLC, Preprogramming Considerations - NAND Flash Ø Type v. Is it raw SLC, raw MLC, or managed? v. If managed, is it consumer card or SMT packaged? Standard or proprietary interface? Ø Huge Device Densities v. Data Pattern file logistics (Gigabytes) Ø Program Disturbs v. Data Output Data Input, but not always an error! Ø Bad Block Management © 2008 BPM Microsystems Confidential and Proprietary

Raw NAND Types 1. Single-Level Cell (SLC) v v Fastest NAND Flash No disturbs Raw NAND Types 1. Single-Level Cell (SLC) v v Fastest NAND Flash No disturbs during preprogramming 2. Multi-Level Cell (MLC) v More memory, but less speed, less intrinsic reliability v 1 -bit disturbs certain, 2 -bit likely v Preprogramming verification must tolerate a specified number of bit errors or yield will be 0% Raw NAND requires an extra algorithm plug-in for Bad Block Management © 2008 BPM Microsystems Confidential and Proprietary

Managed NAND Types 1. Consumer Card v CF, SD, MMC, MS 2. Surface Mount Managed NAND Types 1. Consumer Card v CF, SD, MMC, MS 2. Surface Mount Package v v “Embedded” e. MMC, movi. NAND, i. NAND Easy to preprogram. No extra algorithms necessary! © 2008 BPM Microsystems Confidential and Proprietary

Performance Comparisons © 2008 BPM Microsystems Confidential and Proprietary Performance Comparisons © 2008 BPM Microsystems Confidential and Proprietary

What is Bad Block Management (BBM)? Ø NAND ships from factory with bad blocks, What is Bad Block Management (BBM)? Ø NAND ships from factory with bad blocks, and a scheme must be employed to deal with that. Ø The system preprogramming the NAND must do it exactly the same as the target system. Ø It’s the biggest challenge to ramping up volume preprogramming of NAND. Ø Plan ahead at design time and it won’t be a problem at production time. © 2008 BPM Microsystems Confidential and Proprietary

Raw NAND Requires 2 Algorithms © 2008 BPM Microsystems Confidential and Proprietary Raw NAND Requires 2 Algorithms © 2008 BPM Microsystems Confidential and Proprietary

Who specifies the BBM Algorithm? Ø Ø Ø Ø The provider of the FFS Who specifies the BBM Algorithm? Ø Ø Ø Ø The provider of the FFS software that you integrated? Some undocumented open-source FFS software? The FFS or driver software that you wrote yourself? The MCU/chipset vendor? The NAND Flash vendor? The hardware IP provider? Some combination of the above? The most common answer: “I don’t know. ” © 2008 BPM Microsystems Confidential and Proprietary

Six BBM Preprogramming Elements 1. 2. 3. 4. 5. 6. Bad Block Replacement Strategy Six BBM Preprogramming Elements 1. 2. 3. 4. 5. 6. Bad Block Replacement Strategy Partitioning Error Correction Codes (ECC) Spare Area Placement Free Good Block Formatting Dynamic Metadata © 2008 BPM Microsystems Confidential and Proprietary

Skip Bad Blocks Ø When a bad block is encountered, simply skip ahead to Skip Bad Blocks Ø When a bad block is encountered, simply skip ahead to the next good block. Ø No tables, no tags. Simple Ø Suitable for preprogramming and WORM applications. Most FFS’s will require more sophistication at runtime. Good Bad Good © 2008 BPM Microsystems Confidential and Proprietary Good

Reserve Block Area (RBA) Ø A portion of the flash memory is set aside Reserve Block Area (RBA) Ø A portion of the flash memory is set aside to replace bad blocks. Ø When a bad block is encountered, redirect the data to a replacement block in the RBA, then resume. Ø Usually requires a mapping data structure. Good Bad Good RBA @ End of Device © 2008 BPM Microsystems Confidential and Proprietary

Partitioning for SBB Ø Partitioning is required to prevent regions from encroaching on adjacent Partitioning for SBB Ø Partitioning is required to prevent regions from encroaching on adjacent regions when bad blocks occur. Ø Allows you to guarantee a fixed starting block for IPL, bootloaders, FFS mounts, etc. © 2008 BPM Microsystems Confidential and Proprietary Block 0 1 2 4 5 Bootstrap 1 block Bootloader 2 blocks Padding 2 blocks OS 10 blocks 14 24 25 30 Padding 10 blocks File System 6 blocks Cleanmarkers 2047 2017 blocks

Partitioning for RBA Ø Defines the User Block Area and Reserve Block Area allocations. Partitioning for RBA Ø Defines the User Block Area and Reserve Block Area allocations. Block 0 User Block Area 1638 blocks Reserve Block Area 408 blocks 1637 Ø Bad blocks don’t disrupt the physical location of data on good blocks. © 2008 BPM Microsystems Confidential and Proprietary 1638 2045 2046 2047 Metadata, BB Table 2 blocks

Specifying Partitioning Ø Specify the details of your NAND partitioning to manufacturing or programming Specifying Partitioning Ø Specify the details of your NAND partitioning to manufacturing or programming center. Ø Or, use tools that emit partition tables and furnish the file. © 2008 BPM Microsystems Confidential and Proprietary

ECC Ø Calculated values that allow for detection and correction of bit errors in ECC Ø Calculated values that allow for detection and correction of bit errors in the original data. Ø Preprogrammer must write the ECCs exactly as the target system expects. Ø Definitively specifying an ECC algorithm: v Hamming, Reed-Solomon, BCH v Additional parameters, sub-pages, hybrid schemes Ø Most embedded system designers cannot fully specify the ECC used in their NAND control system. ECCs should be pre-encoded for static data pattern content to boost DPH. © 2008 BPM Microsystems Confidential and Proprietary

Spare Area Placement Ø Aka Out-Of-Band (OOB) Area Ø How are the ECC bytes Spare Area Placement Ø Aka Out-Of-Band (OOB) Area Ø How are the ECC bytes arranged? Ø Bad Block Marker(s) Ø Other metadata Main Spare 2048 64 . . . BB FFS Metadata ECC 0 ECC 1 ECC 2 ECC 3 ECC 4 ECC 5 ECC 6 ECC 7 Marker © 2008 BPM Microsystems Confidential and Proprietary

Free Good Block Formatting Ø What to fill the unused good blocks with. Ø Free Good Block Formatting Ø What to fill the unused good blocks with. Ø For every bad block on the device, one block of FGBF will be discarded. Ø Common Examples: v 0 x. FF / Blank Padding – Completely blank pages are not programmed, just blank checked. This is the most common FGBF. v. JFFS 2 Cleanmarkers © 2008 BPM Microsystems Confidential and Proprietary

Dynamic Metadata Ø Additional computed data written to the device based on the individual Dynamic Metadata Ø Additional computed data written to the device based on the individual DUT. Ø Includes information such as: v. Filesystem headers, erase counts, logical-physical mappings, etc. v. Customized bad block tables v. Other unanticipated crazy stuff © 2008 BPM Microsystems Confidential and Proprietary

Confidentiality and IP Issues Ø Who owns the IP of your BBM algorithm? Ø Confidentiality and IP Issues Ø Who owns the IP of your BBM algorithm? Ø Many hardware and software vendors will not disclose to you the details of their BBM and/or ECC algorithm. Ø Don’t delay your product launch while lawyers execute NDAs. It really happens! © 2008 BPM Microsystems Confidential and Proprietary

Universal BBM for Preprogramming 1. 2. 3. 4. 5. BBR: “Skip Bad Blocks” Partitioning: Universal BBM for Preprogramming 1. 2. 3. 4. 5. BBR: “Skip Bad Blocks” Partitioning: One or more partitions defined. ECCs: Pre-computed in the data pattern. SAP: All Spare Area bytes in the data pattern. FGBF: All unused block formatting or padding (FFh) in the data pattern. 6. Dynamic Metadata: None! Many commercial, open-source, and proprietary BBMs adhere to this. © 2008 BPM Microsystems Confidential and Proprietary

De facto Image File Conventions Ø Flat binary file. 1: 1 mapping to device’s De facto Image File Conventions Ø Flat binary file. 1: 1 mapping to device’s physical blocks, Main+Spare for each page. Ø Contains full page data, all spare area content, including ECCs, needed for board bring-up. Ø Includes all Free Good Block Formatting, even if it’s just blank padding. © 2008 BPM Microsystems Confidential and Proprietary

NAND Drivers & FFS Considerations Ø Open-Source v Ex: Linux JFFS 2, UBI Ø NAND Drivers & FFS Considerations Ø Open-Source v Ex: Linux JFFS 2, UBI Ø Commercial off-the-shelf (COTS) Software v Ex: Flash. FX, Target. FFS, CMX-FFS Ø Hardware Controller + Software v Ex: MSM 7201, OMAP 3530, Databahn+Spectra Ø One-off / Roll-your-own Determine during the design phase preprogramming support for your FFS. © 2008 BPM Microsystems Confidential and Proprietary

BBM Algorithm Plug-ins Ø Generally any BBM algorithm can be combined in the field BBM Algorithm Plug-ins Ø Generally any BBM algorithm can be combined in the field with any Raw NAND device algorithm. v Part number changes are no problem. Ø But beware of “one-off” or “esoteric” BBM schemes! v If it can’t be coded using the defined abstractions, the alternative is to produce a combined BBM+Device algorithm. v Higher development costs v Longer lead times v Can’t change the part number in the field. © 2008 BPM Microsystems Confidential and Proprietary

Bit Error Rate Tolerance for Raw MLC Ø Before MLC, disturbs were a non-issue Bit Error Rate Tolerance for Raw MLC Ø Before MLC, disturbs were a non-issue with factoryfresh devices. Ø Now with MLC, programming a page will corrupt some bits in another page of the same block. Ø Normally this is a verify failure. But with MLC you’ll get 0% yield. Ø The preprogrammer must tolerate a certain number of incorrect bits per page during verify. Ø Specify the BERT in bits per page for your application! © 2008 BPM Microsystems Confidential and Proprietary

Design Tips Ø Fully specify BBM to production: v Six preprogramming elements v BERT Design Tips Ø Fully specify BBM to production: v Six preprogramming elements v BERT for Raw MLC Ø Balance yield vs. waste for bad block allowances. Ø Deliver standard image file. Ø If you are designing an FFS, support the use of “Skip Bad Blocks Compatible” factory preprogramming. FFS vendors can help their customers and increase their product’s adoptability by adhering to this rule! © 2008 BPM Microsystems Confidential and Proprietary

Resources Ø Whitepaper: TODO Ø http: //flashstream. bpmmicro. com Ø http: //www. bpmmicro. com/pdf/FMS Resources Ø Whitepaper: TODO Ø http: //flashstream. bpmmicro. com Ø http: //www. bpmmicro. com/pdf/FMS 2008 White. T 1 BSlides. pdf © 2008 BPM Microsystems Confidential and Proprietary

Questions? © 2008 BPM Microsystems Confidential and Proprietary Questions? © 2008 BPM Microsystems Confidential and Proprietary